/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include "ls_ucode.h"
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#include "acr.h"
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#include <core/firmware.h>
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#include <core/msgqueue.h>
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#include <subdev/pmu.h>
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#include <engine/sec2.h>
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#include <subdev/mc.h>
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#include <subdev/timer.h>
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/**
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* acr_ls_ucode_load_msgqueue - load and prepare a ucode img for a msgqueue fw
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*
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* Load the LS microcode, desc and signature and pack them into a single
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* blob.
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*/
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static int
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acr_ls_ucode_load_msgqueue(const struct nvkm_subdev *subdev, const char *name,
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struct ls_ucode_img *img)
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{
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const struct firmware *image, *desc, *sig;
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char f[64];
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int ret;
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snprintf(f, sizeof(f), "%s/image", name);
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ret = nvkm_firmware_get(subdev->device, f, &image);
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if (ret)
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return ret;
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img->ucode_data = kmemdup(image->data, image->size, GFP_KERNEL);
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nvkm_firmware_put(image);
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if (!img->ucode_data)
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return -ENOMEM;
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snprintf(f, sizeof(f), "%s/desc", name);
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ret = nvkm_firmware_get(subdev->device, f, &desc);
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if (ret)
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return ret;
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memcpy(&img->ucode_desc, desc->data, sizeof(img->ucode_desc));
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img->ucode_size = ALIGN(img->ucode_desc.app_start_offset + img->ucode_desc.app_size, 256);
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nvkm_firmware_put(desc);
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snprintf(f, sizeof(f), "%s/sig", name);
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ret = nvkm_firmware_get(subdev->device, f, &sig);
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if (ret)
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return ret;
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img->sig_size = sig->size;
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img->sig = kmemdup(sig->data, sig->size, GFP_KERNEL);
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nvkm_firmware_put(sig);
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if (!img->sig)
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return -ENOMEM;
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return 0;
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}
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static int
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acr_ls_msgqueue_post_run(struct nvkm_msgqueue *queue,
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struct nvkm_falcon *falcon, u32 addr_args)
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{
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struct nvkm_device *device = falcon->owner->device;
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u8 buf[NVKM_MSGQUEUE_CMDLINE_SIZE];
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memset(buf, 0, sizeof(buf));
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nvkm_msgqueue_write_cmdline(queue, buf);
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nvkm_falcon_load_dmem(falcon, buf, addr_args, sizeof(buf), 0);
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/* rearm the queue so it will wait for the init message */
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nvkm_msgqueue_reinit(queue);
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/* Enable interrupts */
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nvkm_falcon_wr32(falcon, 0x10, 0xff);
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nvkm_mc_intr_mask(device, falcon->owner->index, true);
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/* Start LS firmware on boot falcon */
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nvkm_falcon_start(falcon);
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return 0;
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}
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int
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acr_ls_ucode_load_pmu(const struct nvkm_secboot *sb, struct ls_ucode_img *img)
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{
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struct nvkm_pmu *pmu = sb->subdev.device->pmu;
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int ret;
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ret = acr_ls_ucode_load_msgqueue(&sb->subdev, "pmu", img);
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if (ret)
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return ret;
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/* Allocate the PMU queue corresponding to the FW version */
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ret = nvkm_msgqueue_new(img->ucode_desc.app_version, pmu->falcon,
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sb, &pmu->queue);
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if (ret)
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return ret;
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return 0;
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}
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int
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acr_ls_pmu_post_run(const struct nvkm_acr *acr, const struct nvkm_secboot *sb)
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{
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struct nvkm_device *device = sb->subdev.device;
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struct nvkm_pmu *pmu = device->pmu;
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u32 addr_args = pmu->falcon->data.limit - NVKM_MSGQUEUE_CMDLINE_SIZE;
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int ret;
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ret = acr_ls_msgqueue_post_run(pmu->queue, pmu->falcon, addr_args);
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if (ret)
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return ret;
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nvkm_debug(&sb->subdev, "%s started\n",
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nvkm_secboot_falcon_name[acr->boot_falcon]);
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return 0;
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}
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int
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acr_ls_ucode_load_sec2(const struct nvkm_secboot *sb, struct ls_ucode_img *img)
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{
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struct nvkm_sec2 *sec = sb->subdev.device->sec2;
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int ret;
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ret = acr_ls_ucode_load_msgqueue(&sb->subdev, "sec2", img);
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if (ret)
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return ret;
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/* Allocate the PMU queue corresponding to the FW version */
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ret = nvkm_msgqueue_new(img->ucode_desc.app_version, sec->falcon,
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sb, &sec->queue);
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if (ret)
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return ret;
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return 0;
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}
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int
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acr_ls_sec2_post_run(const struct nvkm_acr *acr, const struct nvkm_secboot *sb)
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{
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const struct nvkm_subdev *subdev = &sb->subdev;
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struct nvkm_device *device = subdev->device;
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struct nvkm_sec2 *sec = device->sec2;
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/* on SEC arguments are always at the beginning of EMEM */
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const u32 addr_args = 0x01000000;
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u32 reg;
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int ret;
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ret = acr_ls_msgqueue_post_run(sec->queue, sec->falcon, addr_args);
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if (ret)
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return ret;
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/*
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* There is a bug where the LS firmware sometimes require to be started
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* twice (this happens only on SEC). Detect and workaround that
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* condition.
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*
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* Once started, the falcon will end up in STOPPED condition (bit 5)
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* if successful, or in HALT condition (bit 4) if not.
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*/
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nvkm_msec(device, 1,
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if ((reg = nvkm_falcon_rd32(sb->boot_falcon, 0x100) & 0x30) != 0)
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break;
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);
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if (reg & BIT(4)) {
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nvkm_debug(subdev, "applying workaround for start bug...\n");
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nvkm_falcon_start(sb->boot_falcon);
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nvkm_msec(subdev->device, 1,
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if ((reg = nvkm_rd32(subdev->device,
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sb->boot_falcon->addr + 0x100)
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& 0x30) != 0)
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break;
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);
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if (reg & BIT(4)) {
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nvkm_error(subdev, "%s failed to start\n",
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nvkm_secboot_falcon_name[acr->boot_falcon]);
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return -EINVAL;
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}
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}
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nvkm_debug(&sb->subdev, "%s started\n",
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nvkm_secboot_falcon_name[acr->boot_falcon]);
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return 0;
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}
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