/*
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* Copyright (C) 2010-2011, 2013-2014, 2016-2017 ARM Limited. All rights reserved.
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*
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* This program is free software and is provided to you under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation, and any use by you of this program is subject to the terms of such GNU licence.
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*
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* A copy of the licence is included with the program, and can also be obtained from Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#ifndef __MALI_TIMESTAMP_H__
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#define __MALI_TIMESTAMP_H__
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#include "mali_osk.h"
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MALI_STATIC_INLINE _mali_osk_errcode_t _mali_timestamp_reset(void)
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{
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/*
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* reset counters and overflow flags
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*/
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u32 mask = (1 << 0) | /* enable all three counters */
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(0 << 1) | /* reset both Count Registers to 0x0 */
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(1 << 2) | /* reset the Cycle Counter Register to 0x0 */
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(0 << 3) | /* 1 = Cycle Counter Register counts every 64th processor clock cycle */
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(0 << 4) | /* Count Register 0 interrupt enable */
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(0 << 5) | /* Count Register 1 interrupt enable */
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(0 << 6) | /* Cycle Counter interrupt enable */
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(0 << 8) | /* Count Register 0 overflow flag (clear or write, flag on read) */
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(0 << 9) | /* Count Register 1 overflow flag (clear or write, flag on read) */
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(1 << 10); /* Cycle Counter Register overflow flag (clear or write, flag on read) */
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__asm__ __volatile__("MCR p15, 0, %0, c15, c12, 0" : : "r"(mask));
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return _MALI_OSK_ERR_OK;
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}
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MALI_STATIC_INLINE u64 _mali_timestamp_get(void)
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{
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u32 result;
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/* this is for the clock cycles */
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__asm__ __volatile__("MRC p15, 0, %0, c15, c12, 1" : "=r"(result));
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return (u64)result;
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}
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#endif /* __MALI_TIMESTAMP_H__ */
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