/*
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* Clock driver for Hi655x
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*
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* Copyright (c) 2017, Linaro Ltd.
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*
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* Author: Daniel Lezcano <daniel.lezcano@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/clk-provider.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/hi655x-pmic.h>
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#define HI655X_CLK_BASE HI655X_BUS_ADDR(0x1c)
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#define HI655X_CLK_SET BIT(6)
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struct hi655x_clk {
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struct hi655x_pmic *hi655x;
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struct clk_hw clk_hw;
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};
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static unsigned long hi655x_clk_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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return 32768;
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}
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static int hi655x_clk_enable(struct clk_hw *hw, bool enable)
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{
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struct hi655x_clk *hi655x_clk =
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container_of(hw, struct hi655x_clk, clk_hw);
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struct hi655x_pmic *hi655x = hi655x_clk->hi655x;
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return regmap_update_bits(hi655x->regmap, HI655X_CLK_BASE,
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HI655X_CLK_SET, enable ? HI655X_CLK_SET : 0);
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}
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static int hi655x_clk_prepare(struct clk_hw *hw)
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{
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return hi655x_clk_enable(hw, true);
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}
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static void hi655x_clk_unprepare(struct clk_hw *hw)
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{
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hi655x_clk_enable(hw, false);
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}
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static int hi655x_clk_is_prepared(struct clk_hw *hw)
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{
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struct hi655x_clk *hi655x_clk =
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container_of(hw, struct hi655x_clk, clk_hw);
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struct hi655x_pmic *hi655x = hi655x_clk->hi655x;
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int ret;
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uint32_t val;
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ret = regmap_read(hi655x->regmap, HI655X_CLK_BASE, &val);
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if (ret < 0)
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return ret;
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return val & HI655X_CLK_BASE;
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}
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static const struct clk_ops hi655x_clk_ops = {
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.prepare = hi655x_clk_prepare,
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.unprepare = hi655x_clk_unprepare,
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.is_prepared = hi655x_clk_is_prepared,
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.recalc_rate = hi655x_clk_recalc_rate,
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};
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static int hi655x_clk_probe(struct platform_device *pdev)
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{
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struct device *parent = pdev->dev.parent;
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struct hi655x_pmic *hi655x = dev_get_drvdata(parent);
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struct hi655x_clk *hi655x_clk;
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const char *clk_name = "hi655x-clk";
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struct clk_init_data init = {
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.name = clk_name,
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.ops = &hi655x_clk_ops
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};
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int ret;
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hi655x_clk = devm_kzalloc(&pdev->dev, sizeof(*hi655x_clk), GFP_KERNEL);
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if (!hi655x_clk)
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return -ENOMEM;
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of_property_read_string_index(parent->of_node, "clock-output-names",
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0, &clk_name);
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hi655x_clk->clk_hw.init = &init;
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hi655x_clk->hi655x = hi655x;
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platform_set_drvdata(pdev, hi655x_clk);
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ret = devm_clk_hw_register(&pdev->dev, &hi655x_clk->clk_hw);
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if (ret)
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return ret;
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return of_clk_add_hw_provider(parent->of_node, of_clk_hw_simple_get,
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&hi655x_clk->clk_hw);
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}
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static struct platform_driver hi655x_clk_driver = {
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.probe = hi655x_clk_probe,
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.driver = {
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.name = "hi655x-clk",
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},
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};
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module_platform_driver(hi655x_clk_driver);
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MODULE_DESCRIPTION("Clk driver for the hi655x series PMICs");
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MODULE_AUTHOR("Daniel Lezcano <daniel.lezcano@linaro.org>");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:hi655x-clk");
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