/* IEEE754 floating point arithmetic
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* single precision square root
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*/
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/*
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* MIPS floating point support
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* Copyright (C) 1994-2000 Algorithmics Ltd.
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "ieee754sp.h"
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union ieee754sp ieee754sp_sqrt(union ieee754sp x)
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{
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int ix, s, q, m, t, i;
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unsigned int r;
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COMPXSP;
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/* take care of Inf and NaN */
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EXPLODEXSP;
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ieee754_clearcx();
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FLUSHXSP;
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/* x == INF or NAN? */
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switch (xc) {
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case IEEE754_CLASS_SNAN:
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return ieee754sp_nanxcpt(x);
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case IEEE754_CLASS_QNAN:
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/* sqrt(Nan) = Nan */
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return x;
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case IEEE754_CLASS_ZERO:
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/* sqrt(0) = 0 */
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return x;
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case IEEE754_CLASS_INF:
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if (xs) {
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/* sqrt(-Inf) = Nan */
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ieee754_setcx(IEEE754_INVALID_OPERATION);
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return ieee754sp_indef();
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}
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/* sqrt(+Inf) = Inf */
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return x;
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case IEEE754_CLASS_DNORM:
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case IEEE754_CLASS_NORM:
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if (xs) {
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/* sqrt(-x) = Nan */
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ieee754_setcx(IEEE754_INVALID_OPERATION);
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return ieee754sp_indef();
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}
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break;
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}
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ix = x.bits;
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/* normalize x */
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m = (ix >> 23);
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if (m == 0) { /* subnormal x */
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for (i = 0; (ix & 0x00800000) == 0; i++)
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ix <<= 1;
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m -= i - 1;
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}
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m -= 127; /* unbias exponent */
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ix = (ix & 0x007fffff) | 0x00800000;
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if (m & 1) /* odd m, double x to make it even */
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ix += ix;
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m >>= 1; /* m = [m/2] */
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/* generate sqrt(x) bit by bit */
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ix += ix;
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s = 0;
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q = 0; /* q = sqrt(x) */
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r = 0x01000000; /* r = moving bit from right to left */
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while (r != 0) {
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t = s + r;
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if (t <= ix) {
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s = t + r;
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ix -= t;
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q += r;
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}
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ix += ix;
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r >>= 1;
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}
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if (ix != 0) {
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ieee754_setcx(IEEE754_INEXACT);
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switch (ieee754_csr.rm) {
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case FPU_CSR_RU:
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q += 2;
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break;
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case FPU_CSR_RN:
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q += (q & 1);
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break;
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}
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}
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ix = (q >> 1) + 0x3f000000;
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ix += (m << 23);
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x.bits = ix;
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return x;
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}
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