/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1996 David S. Miller (dm@sgi.com)
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* Compatibility with board caches, Ulf Carlsson
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*/
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#include <linux/kernel.h>
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#include <asm/sgialib.h>
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#include <asm/bcache.h>
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#include <asm/setup.h>
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/*
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* IP22 boardcache is not compatible with board caches. Thus we disable it
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* during romvec action. Since r4xx0.c is always compiled and linked with your
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* kernel, this shouldn't cause any harm regardless what MIPS processor you
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* have.
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*
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* The ARC write and read functions seem to interfere with the serial lines
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* in some way. You should be careful with them.
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*/
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void prom_putchar(char c)
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{
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ULONG cnt;
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CHAR it = c;
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bc_disable();
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ArcWrite(1, &it, 1, &cnt);
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bc_enable();
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}
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char prom_getchar(void)
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{
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ULONG cnt;
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CHAR c;
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bc_disable();
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ArcRead(0, &c, 1, &cnt);
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bc_enable();
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return c;
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}
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