// SPDX-License-Identifier: GPL-2.0
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "brcm,bcm3384-viper", "brcm,bcm33843-viper";
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memory@0 {
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device_type = "memory";
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/* Typical ranges. The bootloader should fill these in. */
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reg = <0x06000000 0x02000000>,
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<0x0e000000 0x02000000>;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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/* 1/2 of the CPU core clock (standard MIPS behavior) */
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mips-hpt-frequency = <300000000>;
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cpu@0 {
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compatible = "brcm,bmips4350";
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device_type = "cpu";
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reg = <0>;
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};
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};
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cpu_intc: cpu_intc {
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#address-cells = <0>;
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compatible = "mti,cpu-interrupt-controller";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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clocks {
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periph_clk: periph_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <54000000>;
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};
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};
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aliases {
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uart0 = &uart0;
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};
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ubus {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "brcm,ubus", "simple-bus";
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ranges;
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/* No dma-ranges on Viper. */
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periph_intc: periph_intc@14e00048 {
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compatible = "brcm,bcm3380-l2-intc";
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reg = <0x14e00048 0x4 0x14e0004c 0x4>,
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<0x14e00350 0x4 0x14e00354 0x4>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpu_intc>;
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interrupts = <4>;
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};
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cmips_intc: cmips_intc@151f8048 {
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compatible = "brcm,bcm3380-l2-intc";
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reg = <0x151f8048 0x4 0x151f804c 0x4>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <30>;
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brcm,int-map-mask = <0xffffffff>;
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};
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uart0: serial@14e00520 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x14e00520 0x18>;
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interrupt-parent = <&periph_intc>;
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interrupts = <2>;
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clocks = <&periph_clk>;
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status = "disabled";
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};
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ehci0: usb@15400300 {
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compatible = "brcm,bcm3384-ehci", "generic-ehci";
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reg = <0x15400300 0x100>;
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big-endian;
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interrupt-parent = <&periph_intc>;
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interrupts = <41>;
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status = "disabled";
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};
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ohci0: usb@15400400 {
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compatible = "brcm,bcm3384-ohci", "generic-ohci";
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reg = <0x15400400 0x100>;
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big-endian;
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no-big-frame-no;
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interrupt-parent = <&periph_intc>;
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interrupts = <40>;
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status = "disabled";
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};
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};
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};
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