From 1107ecc3e8af31adc7bbd4e08c0614836bd1cebd Mon Sep 17 00:00:00 2001
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From: Romain Naour <romain.naour@gmail.com>
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Date: Wed, 20 Jan 2021 23:22:16 +0100
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Subject: [PATCH] Revert "re PR target/92095 (internal error with -O1
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-mcpu=niagara2 -fPIE)"
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This reverts commit 6bf2990842388101897b6f465524cbc295ee8cf9.
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Building the Buildroot defconfig qemu_sparc_ss10_defconfig using
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gcc 8.4, 9.3 and 10 produce a broken rootfs that trigger illegal
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instruction messages.
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gcc 8.3, 9.2 are the latest working gcc version.
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git bisect between gcc 8.4 and 8.4 allowed to identify
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the commit that introcuce the regression.
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Reverting this patch allowed to produce a working rootfs.
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Signed-off-by: Romain Naour <romain.naour@gmail.com>
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Cc: Eric Botcazou <ebotcazou@gcc.gnu.org>
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---
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gcc/config/sparc/sparc-protos.h | 1 -
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gcc/config/sparc/sparc.c | 121 +++++++-----------
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gcc/config/sparc/sparc.md | 5 +-
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.../gcc.c-torture/compile/20191108-1.c | 14 --
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gcc/testsuite/gcc.target/sparc/overflow-3.c | 2 +-
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gcc/testsuite/gcc.target/sparc/overflow-4.c | 2 +-
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gcc/testsuite/gcc.target/sparc/overflow-5.c | 2 +-
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7 files changed, 53 insertions(+), 94 deletions(-)
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delete mode 100644 gcc/testsuite/gcc.c-torture/compile/20191108-1.c
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diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h
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index f1c120c4860..f4b6f00a7b1 100644
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--- a/gcc/config/sparc/sparc-protos.h
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+++ b/gcc/config/sparc/sparc-protos.h
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@@ -69,7 +69,6 @@ extern void sparc_split_reg_mem (rtx, rtx, machine_mode);
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extern void sparc_split_mem_reg (rtx, rtx, machine_mode);
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extern int sparc_split_reg_reg_legitimate (rtx, rtx);
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extern void sparc_split_reg_reg (rtx, rtx, machine_mode);
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-extern const char *output_load_pcrel_sym (rtx *);
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extern const char *output_ubranch (rtx, rtx_insn *);
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extern const char *output_cbranch (rtx, rtx, int, int, int, rtx_insn *);
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extern const char *output_return (rtx_insn *);
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diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
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index 0553dc501e6..516dcf96d7b 100644
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--- a/gcc/config/sparc/sparc.c
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+++ b/gcc/config/sparc/sparc.c
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@@ -4170,6 +4170,13 @@ eligible_for_sibcall_delay (rtx_insn *trial)
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static bool
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sparc_cannot_force_const_mem (machine_mode mode, rtx x)
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{
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+ /* After IRA has run in PIC mode, it is too late to put anything into the
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+ constant pool if the PIC register hasn't already been initialized. */
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+ if ((lra_in_progress || reload_in_progress)
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+ && flag_pic
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+ && !crtl->uses_pic_offset_table)
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+ return true;
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+
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switch (GET_CODE (x))
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{
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case CONST_INT:
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@@ -4205,11 +4212,9 @@ sparc_cannot_force_const_mem (machine_mode mode, rtx x)
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}
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/* Global Offset Table support. */
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-static GTY(()) rtx got_symbol_rtx = NULL_RTX;
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-static GTY(()) rtx got_register_rtx = NULL_RTX;
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static GTY(()) rtx got_helper_rtx = NULL_RTX;
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-
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-static GTY(()) bool got_helper_needed = false;
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+static GTY(()) rtx got_register_rtx = NULL_RTX;
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+static GTY(()) rtx got_symbol_rtx = NULL_RTX;
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/* Return the SYMBOL_REF for the Global Offset Table. */
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@@ -4222,6 +4227,27 @@ sparc_got (void)
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return got_symbol_rtx;
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}
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+#ifdef HAVE_GAS_HIDDEN
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+# define USE_HIDDEN_LINKONCE 1
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+#else
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+# define USE_HIDDEN_LINKONCE 0
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+#endif
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+
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+static void
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+get_pc_thunk_name (char name[32], unsigned int regno)
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+{
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+ const char *reg_name = reg_names[regno];
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+
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+ /* Skip the leading '%' as that cannot be used in a
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+ symbol name. */
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+ reg_name += 1;
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+
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+ if (USE_HIDDEN_LINKONCE)
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+ sprintf (name, "__sparc_get_pc_thunk.%s", reg_name);
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+ else
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+ ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC", regno);
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+}
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+
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/* Wrapper around the load_pcrel_sym{si,di} patterns. */
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static rtx
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@@ -4241,78 +4267,30 @@ gen_load_pcrel_sym (rtx op0, rtx op1, rtx op2)
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return insn;
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}
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-/* Output the load_pcrel_sym{si,di} patterns. */
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-
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-const char *
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-output_load_pcrel_sym (rtx *operands)
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-{
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- if (flag_delayed_branch)
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- {
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- output_asm_insn ("sethi\t%%hi(%a1-4), %0", operands);
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- output_asm_insn ("call\t%a2", operands);
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- output_asm_insn (" add\t%0, %%lo(%a1+4), %0", operands);
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- }
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- else
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- {
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- output_asm_insn ("sethi\t%%hi(%a1-8), %0", operands);
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- output_asm_insn ("add\t%0, %%lo(%a1-4), %0", operands);
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- output_asm_insn ("call\t%a2", operands);
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- output_asm_insn (" nop", NULL);
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- }
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-
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- if (operands[2] == got_helper_rtx)
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- got_helper_needed = true;
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-
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- return "";
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-}
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-
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-#ifdef HAVE_GAS_HIDDEN
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-# define USE_HIDDEN_LINKONCE 1
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-#else
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-# define USE_HIDDEN_LINKONCE 0
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-#endif
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-
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/* Emit code to load the GOT register. */
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void
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load_got_register (void)
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{
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- rtx insn;
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+ if (!got_register_rtx)
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+ got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
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if (TARGET_VXWORKS_RTP)
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- {
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- if (!got_register_rtx)
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- got_register_rtx = pic_offset_table_rtx;
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-
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- insn = gen_vxworks_load_got ();
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- }
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+ emit_insn (gen_vxworks_load_got ());
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else
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{
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- if (!got_register_rtx)
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- got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
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-
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/* The GOT symbol is subject to a PC-relative relocation so we need a
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helper function to add the PC value and thus get the final value. */
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if (!got_helper_rtx)
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{
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char name[32];
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-
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- /* Skip the leading '%' as that cannot be used in a symbol name. */
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- if (USE_HIDDEN_LINKONCE)
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- sprintf (name, "__sparc_get_pc_thunk.%s",
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- reg_names[REGNO (got_register_rtx)] + 1);
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- else
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- ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC",
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- REGNO (got_register_rtx));
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-
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+ get_pc_thunk_name (name, GLOBAL_OFFSET_TABLE_REGNUM);
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got_helper_rtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (name));
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}
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- insn
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- = gen_load_pcrel_sym (got_register_rtx, sparc_got (), got_helper_rtx);
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+ emit_insn (gen_load_pcrel_sym (got_register_rtx, sparc_got (),
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+ got_helper_rtx));
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}
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-
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- emit_insn (insn);
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}
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/* Ensure that we are not using patterns that are not OK with PIC. */
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@@ -5477,7 +5455,7 @@ save_local_or_in_reg_p (unsigned int regno, int leaf_function)
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return true;
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/* GOT register (%l7) if needed. */
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- if (got_register_rtx && regno == REGNO (got_register_rtx))
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+ if (regno == GLOBAL_OFFSET_TABLE_REGNUM && got_register_rtx)
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return true;
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/* If the function accesses prior frames, the frame pointer and the return
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@@ -12520,9 +12498,10 @@ static void
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sparc_file_end (void)
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{
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/* If we need to emit the special GOT helper function, do so now. */
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- if (got_helper_needed)
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+ if (got_helper_rtx)
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{
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const char *name = XSTR (got_helper_rtx, 0);
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+ const char *reg_name = reg_names[GLOBAL_OFFSET_TABLE_REGNUM];
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#ifdef DWARF2_UNWIND_INFO
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bool do_cfi;
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#endif
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@@ -12559,22 +12538,17 @@ sparc_file_end (void)
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#ifdef DWARF2_UNWIND_INFO
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do_cfi = dwarf2out_do_cfi_asm ();
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if (do_cfi)
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- output_asm_insn (".cfi_startproc", NULL);
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+ fprintf (asm_out_file, "\t.cfi_startproc\n");
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#endif
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if (flag_delayed_branch)
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- {
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- output_asm_insn ("jmp\t%%o7+8", NULL);
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- output_asm_insn (" add\t%%o7, %0, %0", &got_register_rtx);
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- }
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+ fprintf (asm_out_file, "\tjmp\t%%o7+8\n\t add\t%%o7, %s, %s\n",
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+ reg_name, reg_name);
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else
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- {
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- output_asm_insn ("add\t%%o7, %0, %0", &got_register_rtx);
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- output_asm_insn ("jmp\t%%o7+8", NULL);
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- output_asm_insn (" nop", NULL);
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- }
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+ fprintf (asm_out_file, "\tadd\t%%o7, %s, %s\n\tjmp\t%%o7+8\n\t nop\n",
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+ reg_name, reg_name);
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#ifdef DWARF2_UNWIND_INFO
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if (do_cfi)
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- output_asm_insn (".cfi_endproc", NULL);
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+ fprintf (asm_out_file, "\t.cfi_endproc\n");
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#endif
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}
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@@ -13080,10 +13054,7 @@ sparc_init_pic_reg (void)
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edge entry_edge;
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rtx_insn *seq;
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- /* In PIC mode, we need to always initialize the PIC register if optimization
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- is enabled, because we are called from IRA and LRA may later force things
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- to the constant pool for optimization purposes. */
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- if (!flag_pic || (!crtl->uses_pic_offset_table && !optimize))
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+ if (!crtl->uses_pic_offset_table)
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return;
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start_sequence ();
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diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
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index d9ef79c13cc..6dbd054f1c7 100644
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--- a/gcc/config/sparc/sparc.md
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+++ b/gcc/config/sparc/sparc.md
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@@ -1601,7 +1601,10 @@
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(clobber (reg:P O7_REG))]
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"REGNO (operands[0]) == INTVAL (operands[3])"
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{
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- return output_load_pcrel_sym (operands);
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+ if (flag_delayed_branch)
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+ return "sethi\t%%hi(%a1-4), %0\n\tcall\t%a2\n\t add\t%0, %%lo(%a1+4), %0";
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+ else
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+ return "sethi\t%%hi(%a1-8), %0\n\tadd\t%0, %%lo(%a1-4), %0\n\tcall\t%a2\n\t nop";
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}
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[(set (attr "type") (const_string "multi"))
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(set (attr "length")
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diff --git a/gcc/testsuite/gcc.c-torture/compile/20191108-1.c b/gcc/testsuite/gcc.c-torture/compile/20191108-1.c
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deleted file mode 100644
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index 7929751bb06..00000000000
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--- a/gcc/testsuite/gcc.c-torture/compile/20191108-1.c
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+++ /dev/null
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@@ -1,14 +0,0 @@
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-/* PR target/92095 */
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-/* Testcase by Sergei Trofimovich <slyfox@inbox.ru> */
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-
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-typedef union {
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- double a;
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- int b[2];
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-} c;
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-
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-double d(int e)
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-{
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- c f;
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- (&f)->b[0] = 15728640;
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- return e ? -(&f)->a : (&f)->a;
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-}
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diff --git a/gcc/testsuite/gcc.target/sparc/overflow-3.c b/gcc/testsuite/gcc.target/sparc/overflow-3.c
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index 52d6ab2b688..86dddfb09e6 100644
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--- a/gcc/testsuite/gcc.target/sparc/overflow-3.c
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+++ b/gcc/testsuite/gcc.target/sparc/overflow-3.c
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@@ -1,6 +1,6 @@
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/* { dg-do compile } */
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/* { dg-require-effective-target lp64 } */
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-/* { dg-options "-O -fno-pie" } */
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+/* { dg-options "-O" } */
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#include <stdbool.h>
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#include <stdint.h>
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diff --git a/gcc/testsuite/gcc.target/sparc/overflow-4.c b/gcc/testsuite/gcc.target/sparc/overflow-4.c
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index c6121b958c3..019feee335c 100644
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--- a/gcc/testsuite/gcc.target/sparc/overflow-4.c
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+++ b/gcc/testsuite/gcc.target/sparc/overflow-4.c
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@@ -1,6 +1,6 @@
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/* { dg-do compile } */
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/* { dg-require-effective-target lp64 } */
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-/* { dg-options "-O -fno-pie -mno-vis3 -mno-vis4" } */
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+/* { dg-options "-O -mno-vis3 -mno-vis4" } */
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#include <stdbool.h>
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#include <stdint.h>
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diff --git a/gcc/testsuite/gcc.target/sparc/overflow-5.c b/gcc/testsuite/gcc.target/sparc/overflow-5.c
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index f00283f6e7b..67d4ac38095 100644
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--- a/gcc/testsuite/gcc.target/sparc/overflow-5.c
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+++ b/gcc/testsuite/gcc.target/sparc/overflow-5.c
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@@ -1,6 +1,6 @@
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/* { dg-do compile } */
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/* { dg-require-effective-target lp64 } */
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-/* { dg-options "-O -fno-pie -mvis3" } */
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+/* { dg-options "-O -mvis3" } */
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#include <stdbool.h>
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#include <stdint.h>
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--
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2.31.1
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