hc
2023-02-13 e440ec23c5a540cdd3f7464e8779219be6fd3d95
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#
# Configure the GCC_TARGET_ARCH variable and append the
# appropriate RISC-V ISA extensions.
#
 
ifeq ($(BR2_riscv),y)
 
ifeq ($(BR2_RISCV_64),y)
GCC_TARGET_ARCH := rv64i
else
GCC_TARGET_ARCH := rv32i
endif
 
ifeq ($(BR2_RISCV_ISA_RVM),y)
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)m
endif
ifeq ($(BR2_RISCV_ISA_RVA),y)
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)a
endif
ifeq ($(BR2_RISCV_ISA_RVF),y)
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)f
endif
ifeq ($(BR2_RISCV_ISA_RVD),y)
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)d
endif
ifeq ($(BR2_RISCV_ISA_RVC),y)
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)c
endif
 
endif