/* SPDX-License-Identifier: GPL-2.0 */
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2016 Realtek Corporation.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __PHYDMIQK_H__
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#define __PHYDMIQK_H__
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/*--------------------------Define Parameters-------------------------------*/
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#define LOK_delay 1
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#define WBIQK_delay 10
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#define TX_IQK 0
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#define RX_IQK 1
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#define TXIQK 0
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#define RXIQK1 1
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#define RXIQK2 2
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#define GSRXK1 0
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#define GSRXK2 1
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#define kcount_limit_80m 2
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#define kcount_limit_others 4
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#define rxiqk_gs_limit 4
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#define NUM 4
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/*----------------------End Define Parameters-------------------------------*/
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struct dm_iqk_info {
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bool lok_fail[NUM];
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bool iqk_fail[2][NUM];
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u32 iqc_matrix[2][NUM];
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u8 iqk_times;
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u32 rf_reg18;
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u32 lna_idx;
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u8 rxiqk_step;
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u8 tmp1bcc;
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u8 kcount;
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u32 iqk_channel[2];
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bool iqk_fail_report[2][4][2]; /*channel/path/TRX(TX:0, RX:1) */
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u32 iqk_cfir_real[2][4][2]
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[8]; /*channel / path / TRX(TX:0, RX:1) / CFIR_real*/
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u32 iqk_cfir_imag[2][4][2]
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[8]; /*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/
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u8 retry_count[2][4][3]; /* channel / path / (TXK:0, RXK1:1, RXK2:2) */
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u8 gs_retry_count[2][4][2]; /* channel / path / (GSRXK1:0, GSRXK2:1) */
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u8 rxiqk_fail_code[2][4]; /* channel / path
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* 0:SRXK1 fail, 1:RXK1 fail 2:RXK2 fail
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*/
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u32 lok_idac[2][4]; /*channel / path*/
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u16 rxiqk_agc[2][4]; /*channel / path*/
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u32 bypass_iqk[2][4]; /*channel / 0xc94/0xe94*/
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u32 tmp_gntwl;
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bool is_btg;
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bool isbnd;
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};
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#endif
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