// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd. */
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#include <linux/delay.h>
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#include <linux/pm_runtime.h>
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#include <media/v4l2-common.h>
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#include <media/v4l2-event.h>
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#include <media/v4l2-fh.h>
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#include <media/v4l2-ioctl.h>
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#include <media/v4l2-subdev.h>
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#include <media/videobuf2-dma-contig.h>
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#include <linux/dma-iommu.h>
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#include "dev.h"
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#include "regs.h"
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#define CIF_ISP_REQ_BUFS_MIN 1
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static const struct capture_fmt dmarx_fmts[] = {
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/* bayer raw */
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{
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.fourcc = V4L2_PIX_FMT_SRGGB8,
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.mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8,
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.fmt_type = FMT_BAYER,
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.bpp = { 8 },
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.mplanes = 1,
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.write_format = CIF_MI_DMA_CTRL_READ_FMT_PACKED,
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.output_format = CIF_MI_DMA_CTRL_RGB_BAYER_8BIT,
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}, {
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.fourcc = V4L2_PIX_FMT_SGRBG8,
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.mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8,
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.fmt_type = FMT_BAYER,
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.bpp = { 8 },
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.mplanes = 1,
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.write_format = CIF_MI_DMA_CTRL_READ_FMT_PACKED,
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.output_format = CIF_MI_DMA_CTRL_RGB_BAYER_8BIT,
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}, {
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.fourcc = V4L2_PIX_FMT_SGBRG8,
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.mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8,
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.fmt_type = FMT_BAYER,
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.bpp = { 8 },
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.mplanes = 1,
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.write_format = CIF_MI_DMA_CTRL_READ_FMT_PACKED,
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.output_format = CIF_MI_DMA_CTRL_RGB_BAYER_8BIT,
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}, {
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.fourcc = V4L2_PIX_FMT_SBGGR8,
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.mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8,
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.fmt_type = FMT_BAYER,
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.bpp = { 8 },
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.mplanes = 1,
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.write_format = CIF_MI_DMA_CTRL_READ_FMT_PACKED,
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.output_format = CIF_MI_DMA_CTRL_RGB_BAYER_8BIT,
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}, { /* 12bit used, 4 lower bits of LSB unused */
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.fourcc = V4L2_PIX_FMT_SBGGR16,
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.mbus_code = MEDIA_BUS_FMT_SBGGR12_1X12,
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.fmt_type = FMT_BAYER,
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.bpp = { 16 },
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.mplanes = 1,
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.write_format = CIF_MI_DMA_CTRL_READ_FMT_PACKED,
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.output_format = CIF_MI_DMA_CTRL_RGB_BAYER_16BIT,
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}, {
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.fourcc = V4L2_PIX_FMT_YUYV,
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.mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
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.fmt_type = FMT_YUV,
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.bpp = { 16 },
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.cplanes = 1,
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.mplanes = 1,
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.uv_swap = 0,
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.write_format = CIF_MI_DMA_CTRL_READ_FMT_PACKED,
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.output_format = CIF_MI_DMA_CTRL_FMT_YUV422,
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}, {
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.fourcc = V4L2_PIX_FMT_YVYU,
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.mbus_code = MEDIA_BUS_FMT_YVYU8_2X8,
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.fmt_type = FMT_YUV,
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.bpp = { 16 },
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.cplanes = 1,
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.mplanes = 1,
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.uv_swap = 0,
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.write_format = CIF_MI_DMA_CTRL_READ_FMT_PACKED,
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.output_format = CIF_MI_DMA_CTRL_FMT_YUV422,
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}, {
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.fourcc = V4L2_PIX_FMT_UYVY,
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.mbus_code = MEDIA_BUS_FMT_UYVY8_2X8,
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.fmt_type = FMT_YUV,
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.bpp = { 16 },
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.cplanes = 1,
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.mplanes = 1,
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.uv_swap = 0,
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.write_format = CIF_MI_DMA_CTRL_READ_FMT_PACKED,
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.output_format = CIF_MI_DMA_CTRL_FMT_YUV422,
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}, {
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.fourcc = V4L2_PIX_FMT_VYUY,
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.mbus_code = MEDIA_BUS_FMT_VYUY8_2X8,
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.fmt_type = FMT_YUV,
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.bpp = { 16 },
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.cplanes = 1,
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.mplanes = 1,
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.uv_swap = 0,
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.write_format = CIF_MI_DMA_CTRL_READ_FMT_PACKED,
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.output_format = CIF_MI_DMA_CTRL_FMT_YUV422,
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}
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};
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static struct stream_config rkisp1_dmarx_stream_config = {
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.fmts = dmarx_fmts,
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.fmt_size = ARRAY_SIZE(dmarx_fmts),
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.mi = {
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.y_size_init = CIF_MI_DMA_Y_PIC_SIZE,
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.y_base_ad_init = CIF_MI_DMA_Y_PIC_START_AD,
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.cb_base_ad_init = CIF_MI_DMA_CB_PIC_START_AD,
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.cr_base_ad_init = CIF_MI_DMA_CR_PIC_START_AD,
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},
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};
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static const
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struct capture_fmt *find_fmt(struct rkisp1_stream *stream,
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const u32 pixelfmt)
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{
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const struct capture_fmt *fmt;
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int i;
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for (i = 0; i < stream->config->fmt_size; i++) {
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fmt = &stream->config->fmts[i];
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if (fmt->fourcc == pixelfmt)
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return fmt;
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}
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return NULL;
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}
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static int dmarx_config_mi(struct rkisp1_stream *stream)
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{
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struct rkisp1_device *dev = stream->ispdev;
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void __iomem *base = dev->base_addr;
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struct capture_fmt *dmarx_in_fmt = &stream->out_isp_fmt;
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v4l2_dbg(1, rkisp1_debug, &dev->v4l2_dev,
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"%s %dx%x y_stride:%d\n", __func__,
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stream->out_fmt.width,
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stream->out_fmt.height,
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stream->u.dmarx.y_stride);
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mi_set_y_size(stream, stream->out_fmt.width *
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stream->out_fmt.height);
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dmarx_set_y_width(base, stream->out_fmt.width);
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dmarx_set_y_line_length(base, stream->u.dmarx.y_stride);
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mi_dmarx_ready_enable(stream);
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if (dmarx_in_fmt->uv_swap)
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dmarx_set_uv_swap(base);
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dmarx_ctrl(base,
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dmarx_in_fmt->write_format |
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dmarx_in_fmt->output_format |
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CIF_MI_DMA_CTRL_BURST_LEN_LUM_16 |
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CIF_MI_DMA_CTRL_BURST_LEN_CHROM_16);
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return 0;
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}
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static void update_dmarx(struct rkisp1_stream *stream)
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{
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void __iomem *base = stream->ispdev->base_addr;
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if (stream->curr_buf) {
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mi_set_y_addr(stream,
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stream->curr_buf->buff_addr[RKISP1_PLANE_Y]);
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mi_set_cb_addr(stream,
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stream->curr_buf->buff_addr[RKISP1_PLANE_CB]);
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mi_set_cr_addr(stream,
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stream->curr_buf->buff_addr[RKISP1_PLANE_CR]);
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mi_dmarx_start(base);
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stream->frame_end = false;
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}
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}
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static void dmarx_stop_mi(struct rkisp1_stream *stream)
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{
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mi_dmarx_ready_disable(stream);
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}
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static struct streams_ops rkisp1_dmarx_streams_ops = {
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.config_mi = dmarx_config_mi,
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.stop_mi = dmarx_stop_mi,
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.update_mi = update_dmarx,
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};
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static int dmarx_frame_end(struct rkisp1_stream *stream)
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{
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unsigned long lock_flags = 0;
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if (stream->curr_buf) {
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vb2_buffer_done(&stream->curr_buf->vb.vb2_buf,
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VB2_BUF_STATE_DONE);
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stream->curr_buf = NULL;
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}
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spin_lock_irqsave(&stream->vbq_lock, lock_flags);
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if (!list_empty(&stream->buf_queue)) {
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stream->curr_buf =
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list_first_entry(&stream->buf_queue,
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struct rkisp1_buffer,
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queue);
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list_del(&stream->curr_buf->queue);
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}
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spin_unlock_irqrestore(&stream->vbq_lock, lock_flags);
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stream->ops->update_mi(stream);
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return 0;
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}
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/***************************** vb2 operations*******************************/
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static void dmarx_stop(struct rkisp1_stream *stream)
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{
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struct rkisp1_device *dev = stream->ispdev;
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struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
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int ret = 0;
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stream->stopping = true;
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if (dev->isp_state == ISP_START &&
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!stream->frame_end) {
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ret = wait_event_timeout(stream->done,
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!stream->streaming,
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msecs_to_jiffies(500));
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if (!ret)
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v4l2_warn(v4l2_dev,
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"dmarx:%d waiting on event return error %d\n",
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stream->id, ret);
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}
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if (stream->ops->stop_mi)
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stream->ops->stop_mi(stream);
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stream->stopping = false;
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stream->streaming = false;
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stream->frame_end = false;
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}
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static int dmarx_start(struct rkisp1_stream *stream)
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{
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int ret;
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ret = stream->ops->config_mi(stream);
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if (ret)
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return ret;
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stream->curr_buf = NULL;
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dmarx_frame_end(stream);
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stream->streaming = true;
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return 0;
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}
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static int rkisp1_queue_setup(struct vb2_queue *queue,
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unsigned int *num_buffers,
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unsigned int *num_planes,
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unsigned int sizes[],
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struct device *alloc_ctxs[])
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{
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struct rkisp1_stream *stream = queue->drv_priv;
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struct rkisp1_device *dev = stream->ispdev;
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const struct v4l2_pix_format_mplane *pixm = NULL;
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const struct capture_fmt *isp_fmt = NULL;
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u32 i;
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pixm = &stream->out_fmt;
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isp_fmt = &stream->out_isp_fmt;
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*num_planes = isp_fmt->mplanes;
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for (i = 0; i < isp_fmt->mplanes; i++) {
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const struct v4l2_plane_pix_format *plane_fmt;
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plane_fmt = &pixm->plane_fmt[i];
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sizes[i] = plane_fmt->sizeimage;
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}
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v4l2_dbg(1, rkisp1_debug, &dev->v4l2_dev, "%s count %d, size %d\n",
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v4l2_type_names[queue->type], *num_buffers, sizes[0]);
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return 0;
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}
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/*
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* The vb2_buffer are stored in rkisp1_buffer, in order to unify
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* mplane buffer and none-mplane buffer.
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*/
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static void rkisp1_buf_queue(struct vb2_buffer *vb)
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{
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struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
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struct rkisp1_buffer *ispbuf = to_rkisp1_buffer(vbuf);
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struct vb2_queue *queue = vb->vb2_queue;
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struct rkisp1_stream *stream = queue->drv_priv;
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unsigned long lock_flags = 0;
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struct v4l2_pix_format_mplane *pixm = &stream->out_fmt;
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struct capture_fmt *isp_fmt = &stream->out_isp_fmt;
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int i;
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memset(ispbuf->buff_addr, 0, sizeof(ispbuf->buff_addr));
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for (i = 0; i < isp_fmt->mplanes; i++)
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ispbuf->buff_addr[i] = vb2_dma_contig_plane_dma_addr(vb, i);
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/*
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* NOTE: plane_fmt[0].sizeimage is total size of all planes for single
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* memory plane formats, so calculate the size explicitly.
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*/
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if (isp_fmt->mplanes == 1) {
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for (i = 0; i < isp_fmt->cplanes - 1; i++) {
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ispbuf->buff_addr[i + 1] = (i == 0) ?
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ispbuf->buff_addr[i] +
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pixm->plane_fmt[i].bytesperline *
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pixm->height :
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ispbuf->buff_addr[i] +
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pixm->plane_fmt[i].sizeimage;
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}
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}
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spin_lock_irqsave(&stream->vbq_lock, lock_flags);
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if (stream->streaming &&
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list_empty(&stream->buf_queue) &&
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!stream->curr_buf) {
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stream->curr_buf = ispbuf;
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stream->ops->update_mi(stream);
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} else {
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list_add_tail(&ispbuf->queue, &stream->buf_queue);
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}
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spin_unlock_irqrestore(&stream->vbq_lock, lock_flags);
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}
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static void dmarx_stop_streaming(struct vb2_queue *queue)
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{
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struct rkisp1_stream *stream = queue->drv_priv;
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struct rkisp1_buffer *buf;
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unsigned long lock_flags = 0;
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dmarx_stop(stream);
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spin_lock_irqsave(&stream->vbq_lock, lock_flags);
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if (stream->curr_buf) {
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list_add_tail(&stream->curr_buf->queue, &stream->buf_queue);
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stream->curr_buf = NULL;
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}
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while (!list_empty(&stream->buf_queue)) {
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buf = list_first_entry(&stream->buf_queue,
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struct rkisp1_buffer, queue);
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list_del(&buf->queue);
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vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
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}
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spin_unlock_irqrestore(&stream->vbq_lock, lock_flags);
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}
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static int dmarx_start_streaming(struct vb2_queue *queue,
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unsigned int count)
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{
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struct rkisp1_stream *stream = queue->drv_priv;
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struct rkisp1_device *dev = stream->ispdev;
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struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
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int ret = 0;
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if (atomic_read(&dev->open_cnt) < 2) {
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v4l2_err(v4l2_dev,
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"other stream should enable first\n");
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return -EINVAL;
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}
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if (WARN_ON(stream->streaming))
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return -EBUSY;
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ret = dmarx_start(stream);
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if (ret < 0)
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v4l2_err(v4l2_dev,
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"start dmarx stream:%d failed\n",
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stream->id);
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return ret;
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}
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static struct vb2_ops dmarx_vb2_ops = {
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.queue_setup = rkisp1_queue_setup,
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.buf_queue = rkisp1_buf_queue,
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.wait_prepare = vb2_ops_wait_prepare,
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.wait_finish = vb2_ops_wait_finish,
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.stop_streaming = dmarx_stop_streaming,
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.start_streaming = dmarx_start_streaming,
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};
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static int rkisp_init_vb2_queue(struct vb2_queue *q,
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struct rkisp1_stream *stream,
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enum v4l2_buf_type buf_type)
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{
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q->type = buf_type;
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q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_USERPTR;
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q->drv_priv = stream;
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q->ops = &dmarx_vb2_ops;
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q->mem_ops = &vb2_dma_contig_memops;
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q->buf_struct_size = sizeof(struct rkisp1_buffer);
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q->min_buffers_needed = CIF_ISP_REQ_BUFS_MIN;
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q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
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q->lock = &stream->ispdev->apilock;
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return vb2_queue_init(q);
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}
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static int rkisp1_set_fmt(struct rkisp1_stream *stream,
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struct v4l2_pix_format_mplane *pixm,
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bool try)
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{
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const struct capture_fmt *fmt;
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unsigned int imagsize = 0;
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unsigned int planes;
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u32 xsubs = 1, ysubs = 1;
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unsigned int i;
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fmt = find_fmt(stream, pixm->pixelformat);
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if (!fmt) {
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v4l2_err(&stream->ispdev->v4l2_dev,
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"nonsupport pixelformat:%c%c%c%c\n",
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pixm->pixelformat,
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pixm->pixelformat >> 8,
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pixm->pixelformat >> 16,
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pixm->pixelformat >> 24);
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return -EINVAL;
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}
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pixm->num_planes = fmt->mplanes;
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pixm->field = V4L2_FIELD_NONE;
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if (!pixm->quantization)
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pixm->quantization = V4L2_QUANTIZATION_FULL_RANGE;
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/* calculate size */
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fcc_xysubs(fmt->fourcc, &xsubs, &ysubs);
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planes = fmt->cplanes ? fmt->cplanes : fmt->mplanes;
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for (i = 0; i < planes; i++) {
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struct v4l2_plane_pix_format *plane_fmt;
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unsigned int width, height, bytesperline;
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plane_fmt = pixm->plane_fmt + i;
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if (i == 0) {
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width = pixm->width;
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height = pixm->height;
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} else {
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width = pixm->width / xsubs;
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height = pixm->height / ysubs;
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}
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bytesperline = width * DIV_ROUND_UP(fmt->bpp[i], 8);
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/* stride is only available for sp stream and y plane */
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if (i != 0 ||
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plane_fmt->bytesperline < bytesperline)
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plane_fmt->bytesperline = bytesperline;
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plane_fmt->sizeimage = plane_fmt->bytesperline * height;
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imagsize += plane_fmt->sizeimage;
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}
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/* convert to non-MPLANE format.
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* it's important since we want to unify none-MPLANE
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* and MPLANE.
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*/
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if (fmt->mplanes == 1)
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pixm->plane_fmt[0].sizeimage = imagsize;
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if (!try) {
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stream->out_isp_fmt = *fmt;
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stream->out_fmt = *pixm;
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stream->u.dmarx.y_stride =
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pixm->plane_fmt[0].bytesperline /
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DIV_ROUND_UP(fmt->bpp[0], 8);
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v4l2_dbg(1, rkisp1_debug, &stream->ispdev->v4l2_dev,
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"%s: stream: %d req(%d, %d) out(%d, %d)\n", __func__,
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stream->id, pixm->width, pixm->height,
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stream->out_fmt.width, stream->out_fmt.height);
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}
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return 0;
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}
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/************************* v4l2_file_operations***************************/
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static const struct v4l2_file_operations rkisp1_fops = {
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.open = rkisp1_fh_open,
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.release = rkisp1_fop_release,
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.unlocked_ioctl = video_ioctl2,
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.poll = vb2_fop_poll,
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.mmap = vb2_fop_mmap,
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};
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static int rkisp1_try_fmt_vid_out_mplane(struct file *file, void *fh,
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struct v4l2_format *f)
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{
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struct rkisp1_stream *stream = video_drvdata(file);
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return rkisp1_set_fmt(stream, &f->fmt.pix_mp, true);
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}
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static int rkisp1_enum_fmt_vid_out_mplane(struct file *file, void *priv,
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struct v4l2_fmtdesc *f)
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{
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struct rkisp1_stream *stream = video_drvdata(file);
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const struct capture_fmt *fmt = NULL;
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if (f->index >= stream->config->fmt_size)
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return -EINVAL;
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fmt = &stream->config->fmts[f->index];
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f->pixelformat = fmt->fourcc;
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return 0;
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}
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static int rkisp1_s_fmt_vid_out_mplane(struct file *file,
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void *priv, struct v4l2_format *f)
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{
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struct rkisp1_stream *stream = video_drvdata(file);
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struct video_device *vdev = &stream->vnode.vdev;
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struct rkisp1_vdev_node *node = vdev_to_node(vdev);
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struct rkisp1_device *dev = stream->ispdev;
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if (vb2_is_busy(&node->buf_queue)) {
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v4l2_err(&dev->v4l2_dev, "%s queue busy\n", __func__);
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return -EBUSY;
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}
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return rkisp1_set_fmt(stream, &f->fmt.pix_mp, false);
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}
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static int rkisp1_g_fmt_vid_out_mplane(struct file *file, void *fh,
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struct v4l2_format *f)
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{
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struct rkisp1_stream *stream = video_drvdata(file);
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f->fmt.pix_mp = stream->out_fmt;
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return 0;
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}
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static int rkisp1_querycap(struct file *file, void *priv,
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struct v4l2_capability *cap)
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{
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struct rkisp1_stream *stream = video_drvdata(file);
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struct device *dev = stream->ispdev->dev;
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struct video_device *vdev = video_devdata(file);
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strlcpy(cap->card, vdev->name, sizeof(cap->card));
|
snprintf(cap->driver, sizeof(cap->driver),
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"%s_v%d", dev->driver->name,
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stream->ispdev->isp_ver >> 4);
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snprintf(cap->bus_info, sizeof(cap->bus_info),
|
"platform:%s", dev_name(dev));
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return 0;
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}
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|
static const struct v4l2_ioctl_ops rkisp1_dmarx_ioctl = {
|
.vidioc_reqbufs = vb2_ioctl_reqbufs,
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.vidioc_querybuf = vb2_ioctl_querybuf,
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.vidioc_create_bufs = vb2_ioctl_create_bufs,
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.vidioc_qbuf = vb2_ioctl_qbuf,
|
.vidioc_expbuf = vb2_ioctl_expbuf,
|
.vidioc_dqbuf = vb2_ioctl_dqbuf,
|
.vidioc_prepare_buf = vb2_ioctl_prepare_buf,
|
.vidioc_streamon = vb2_ioctl_streamon,
|
.vidioc_streamoff = vb2_ioctl_streamoff,
|
.vidioc_try_fmt_vid_out_mplane = rkisp1_try_fmt_vid_out_mplane,
|
.vidioc_enum_fmt_vid_out_mplane = rkisp1_enum_fmt_vid_out_mplane,
|
.vidioc_s_fmt_vid_out_mplane = rkisp1_s_fmt_vid_out_mplane,
|
.vidioc_g_fmt_vid_out_mplane = rkisp1_g_fmt_vid_out_mplane,
|
.vidioc_querycap = rkisp1_querycap,
|
};
|
|
static void rkisp1_unregister_dmarx_video(struct rkisp1_stream *stream)
|
{
|
media_entity_cleanup(&stream->vnode.vdev.entity);
|
video_unregister_device(&stream->vnode.vdev);
|
}
|
|
static int rkisp1_register_dmarx_video(struct rkisp1_stream *stream)
|
{
|
struct rkisp1_device *dev = stream->ispdev;
|
struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
|
struct video_device *vdev = &stream->vnode.vdev;
|
struct rkisp1_vdev_node *node;
|
int ret = 0;
|
|
node = vdev_to_node(vdev);
|
|
vdev->release = video_device_release_empty;
|
vdev->fops = &rkisp1_fops;
|
vdev->minor = -1;
|
vdev->v4l2_dev = v4l2_dev;
|
vdev->lock = &dev->apilock;
|
video_set_drvdata(vdev, stream);
|
|
vdev->ioctl_ops = &rkisp1_dmarx_ioctl;
|
vdev->device_caps = V4L2_CAP_VIDEO_OUTPUT_MPLANE |
|
V4L2_CAP_STREAMING;
|
vdev->vfl_dir = VFL_DIR_TX;
|
node->pad.flags = MEDIA_PAD_FL_SOURCE;
|
|
rkisp_init_vb2_queue(&node->buf_queue, stream,
|
V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE);
|
vdev->queue = &node->buf_queue;
|
|
ret = video_register_device(vdev, VFL_TYPE_GRABBER, -1);
|
if (ret < 0) {
|
v4l2_err(v4l2_dev,
|
"video register failed with error %d\n", ret);
|
return ret;
|
}
|
|
ret = media_entity_pads_init(&vdev->entity, 1, &node->pad);
|
if (ret < 0)
|
goto unreg;
|
|
return 0;
|
unreg:
|
video_unregister_device(vdev);
|
return ret;
|
}
|
|
/**************** Interrupter Handler ****************/
|
|
void rkisp1_dmarx_isr(u32 mis_val, struct rkisp1_device *dev)
|
{
|
void __iomem *base = dev->base_addr;
|
struct rkisp1_stream *stream;
|
|
if (mis_val & CIF_MI_DMA_READY) {
|
stream = &dev->dmarx_dev.stream[RKISP1_STREAM_DMARX];
|
stream->frame_end = true;
|
writel(CIF_MI_DMA_READY, base + CIF_MI_ICR);
|
|
if (stream->stopping) {
|
stream->stopping = false;
|
stream->streaming = false;
|
wake_up(&stream->done);
|
} else {
|
dmarx_frame_end(stream);
|
}
|
}
|
}
|
|
int rkisp1_register_dmarx_vdev(struct rkisp1_device *dev)
|
{
|
struct rkisp1_dmarx_device *dmarx_dev = &dev->dmarx_dev;
|
struct rkisp1_stream *stream;
|
struct video_device *vdev;
|
struct media_entity *source, *sink;
|
int ret = 0;
|
|
memset(dmarx_dev, 0, sizeof(*dmarx_dev));
|
dmarx_dev->ispdev = dev;
|
|
if (dev->isp_ver <= ISP_V13) {
|
stream = &dmarx_dev->stream[RKISP1_STREAM_DMARX];
|
INIT_LIST_HEAD(&stream->buf_queue);
|
init_waitqueue_head(&stream->done);
|
spin_lock_init(&stream->vbq_lock);
|
stream->id = RKISP1_STREAM_DMARX;
|
stream->ispdev = dev;
|
stream->ops = &rkisp1_dmarx_streams_ops;
|
stream->config = &rkisp1_dmarx_stream_config;
|
vdev = &stream->vnode.vdev;
|
strlcpy(vdev->name, DMA_VDEV_NAME, sizeof(vdev->name));
|
ret = rkisp1_register_dmarx_video(stream);
|
if (ret < 0)
|
return ret;
|
|
/* dmarx links -> isp subdev */
|
source = &vdev->entity;
|
sink = &dev->isp_sdev.sd.entity;
|
ret = media_create_pad_link(source, 0,
|
sink, RKISP1_ISP_PAD_SINK, 0);
|
}
|
|
return ret;
|
}
|
|
void rkisp1_unregister_dmarx_vdev(struct rkisp1_device *dev)
|
{
|
struct rkisp1_dmarx_device *dmarx_dev = &dev->dmarx_dev;
|
struct rkisp1_stream *stream;
|
|
if (dev->isp_ver <= ISP_V13) {
|
stream = &dmarx_dev->stream[RKISP1_STREAM_DMARX];
|
rkisp1_unregister_dmarx_video(stream);
|
}
|
}
|
