# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/rockchip,clk-out.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip Clock Out Control Module Binding
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maintainers:
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- Sugar Zhang <sugar.zhang@rock-chips.com>
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description: |
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This add support switch for clk-bidirection which located
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at GRF, such as SAIx_MCLK_{IN OUT} which share the same pin.
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and these config maybe located in many pieces of GRF,
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which hard to addressed in one single clk driver. so, we add
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this simple helper driver to address this situation.
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In order to simplify implement and usage, and also for safety
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clk usage (avoid high freq glitch), we set all clk out as disabled
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(which means Input default for clk-bidrection) in the pre-stage,
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such boot-loader or init by HW default. And then set a safety freq
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before enable clk-out, such as "assign-clock-rates" or clk_set_rate
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in drivers.
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properties:
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compatible:
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enum:
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- rockchip,clk-out
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reg:
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maxItems: 1
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"#clock-cells":
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const: 1
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clocks:
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maxItems: 1
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description: parent clocks.
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power-domains:
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maxItems: 1
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clock-output-names:
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maxItems: 1
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rockchip,bit-shift:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Defines the bit shift of clk out enable.
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rockchip,bit-set-to-disable:
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type: boolean
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description: |
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By default this clock sets the bit at bit-shift to enable the clock.
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Setting this property does the opposite: setting the bit disable
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the clock and clearing it enables the clock.
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required:
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- compatible
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- reg
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- clocks
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- "#clock-cells"
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- clock-output-names
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- rockchip,bit-shift
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additionalProperties: false
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examples:
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# Clock Provider node:
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- |
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mclkin_sai0: mclkin-sai0 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <12288000>;
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clock-output-names = "mclk_sai0_from_io";
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};
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mclkout_sai0: mclkout-sai0@ff040070 {
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compatible = "rockchip,clk-out";
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reg = <0 0xff040070 0 0x4>;
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clocks = <&cru MCLK_SAI0_OUT2IO>;
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#clock-cells = <0>;
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clock-output-names = "mclk_sai0_to_io";
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rockchip,bit-shift = <4>;
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};
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# Clock mclkout Consumer node:
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- |
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ext_codec {
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clocks = <&mclkout_sai0>;
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clock-names = "mclk";
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assigned-clocks = <&mclkout_sai0>;
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assigned-clock-rates = <12288000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s0m0_mclk>;
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};
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# Clock mclkin Consumer node:
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- |
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ext_codec {
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clocks = <&mclkin_sai0>;
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clock-names = "mclk";
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assigned-clocks = <&cru CLK_SAI0>;
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assigned-clock-parents = <&mclkin_sai0>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s0m0_mclk>;
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};
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