/**
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* Copyright (C) ST-Ericsson SA 2010
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* Author: Shujuan Chen <shujuan.chen@stericsson.com> for ST-Ericsson.
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* Author: Jonas Linde <jonas.linde@stericsson.com> for ST-Ericsson.
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* Author: Joakim Bech <joakim.xx.bech@stericsson.com> for ST-Ericsson.
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* Author: Berne Hebark <berne.herbark@stericsson.com> for ST-Ericsson.
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* Author: Niklas Hernaeus <niklas.hernaeus@stericsson.com> for ST-Ericsson.
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* License terms: GNU General Public License (GPL) version 2
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*/
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#ifndef _CRYP_P_H_
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#define _CRYP_P_H_
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#include <linux/io.h>
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#include <linux/bitops.h>
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#include "cryp.h"
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#include "cryp_irqp.h"
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/**
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* Generic Macros
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*/
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#define CRYP_SET_BITS(reg_name, mask) \
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writel_relaxed((readl_relaxed(reg_name) | mask), reg_name)
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#define CRYP_WRITE_BIT(reg_name, val, mask) \
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writel_relaxed(((readl_relaxed(reg_name) & ~(mask)) |\
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((val) & (mask))), reg_name)
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#define CRYP_TEST_BITS(reg_name, val) \
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(readl_relaxed(reg_name) & (val))
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#define CRYP_PUT_BITS(reg, val, shift, mask) \
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writel_relaxed(((readl_relaxed(reg) & ~(mask)) | \
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(((u32)val << shift) & (mask))), reg)
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/**
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* CRYP specific Macros
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*/
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#define CRYP_PERIPHERAL_ID0 0xE3
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#define CRYP_PERIPHERAL_ID1 0x05
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#define CRYP_PERIPHERAL_ID2_DB8500 0x28
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#define CRYP_PERIPHERAL_ID3 0x00
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#define CRYP_PCELL_ID0 0x0D
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#define CRYP_PCELL_ID1 0xF0
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#define CRYP_PCELL_ID2 0x05
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#define CRYP_PCELL_ID3 0xB1
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/**
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* CRYP register default values
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*/
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#define MAX_DEVICE_SUPPORT 2
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/* Priv set, keyrden set and datatype 8bits swapped set as default. */
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#define CRYP_CR_DEFAULT 0x0482
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#define CRYP_DMACR_DEFAULT 0x0
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#define CRYP_IMSC_DEFAULT 0x0
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#define CRYP_DIN_DEFAULT 0x0
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#define CRYP_DOUT_DEFAULT 0x0
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#define CRYP_KEY_DEFAULT 0x0
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#define CRYP_INIT_VECT_DEFAULT 0x0
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/**
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* CRYP Control register specific mask
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*/
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#define CRYP_CR_SECURE_MASK BIT(0)
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#define CRYP_CR_PRLG_MASK BIT(1)
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#define CRYP_CR_ALGODIR_MASK BIT(2)
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#define CRYP_CR_ALGOMODE_MASK (BIT(5) | BIT(4) | BIT(3))
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#define CRYP_CR_DATATYPE_MASK (BIT(7) | BIT(6))
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#define CRYP_CR_KEYSIZE_MASK (BIT(9) | BIT(8))
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#define CRYP_CR_KEYRDEN_MASK BIT(10)
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#define CRYP_CR_KSE_MASK BIT(11)
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#define CRYP_CR_START_MASK BIT(12)
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#define CRYP_CR_INIT_MASK BIT(13)
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#define CRYP_CR_FFLUSH_MASK BIT(14)
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#define CRYP_CR_CRYPEN_MASK BIT(15)
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#define CRYP_CR_CONTEXT_SAVE_MASK (CRYP_CR_SECURE_MASK |\
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CRYP_CR_PRLG_MASK |\
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CRYP_CR_ALGODIR_MASK |\
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CRYP_CR_ALGOMODE_MASK |\
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CRYP_CR_DATATYPE_MASK |\
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CRYP_CR_KEYSIZE_MASK |\
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CRYP_CR_KEYRDEN_MASK |\
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CRYP_CR_DATATYPE_MASK)
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#define CRYP_SR_INFIFO_READY_MASK (BIT(0) | BIT(1))
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#define CRYP_SR_IFEM_MASK BIT(0)
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#define CRYP_SR_BUSY_MASK BIT(4)
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/**
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* Bit position used while setting bits in register
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*/
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#define CRYP_CR_PRLG_POS 1
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#define CRYP_CR_ALGODIR_POS 2
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#define CRYP_CR_ALGOMODE_POS 3
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#define CRYP_CR_DATATYPE_POS 6
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#define CRYP_CR_KEYSIZE_POS 8
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#define CRYP_CR_KEYRDEN_POS 10
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#define CRYP_CR_KSE_POS 11
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#define CRYP_CR_START_POS 12
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#define CRYP_CR_INIT_POS 13
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#define CRYP_CR_CRYPEN_POS 15
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#define CRYP_SR_BUSY_POS 4
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/**
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* CRYP PCRs------PC_NAND control register
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* BIT_MASK
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*/
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#define CRYP_DMA_REQ_MASK (BIT(1) | BIT(0))
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#define CRYP_DMA_REQ_MASK_POS 0
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struct cryp_system_context {
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/* CRYP Register structure */
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struct cryp_register *p_cryp_reg[MAX_DEVICE_SUPPORT];
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};
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#endif
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