* Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
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Required properties:
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- compatible : Must include "fsl,qoriq-tmu". The version of the device is
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determined by the TMU IP Block Revision Register (IPBRR0) at
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offset 0x0BF8.
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Table of correspondences between IPBRR0 values and example chips:
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Value Device
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---------- -----
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0x01900102 T1040
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- reg : Address range of TMU registers.
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- interrupts : Contains the interrupt for TMU.
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- fsl,tmu-range : The values to be programmed into TTRnCR, as specified by
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the SoC reference manual. The first cell is TTR0CR, the second is
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TTR1CR, etc.
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- fsl,tmu-calibration : A list of cell pairs containing temperature
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calibration data, as specified by the SoC reference manual.
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The first cell of each pair is the value to be written to TTCFGR,
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and the second is the value to be written to TSCFGR.
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- #thermal-sensor-cells : Must be 1. The sensor specifier is the monitoring
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site ID, and represents the "n" in TRITSRn and TRATSRn.
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Optional property:
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- little-endian : If present, the TMU registers are little endian. If absent,
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the default is big endian.
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Example:
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tmu@f0000 {
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compatible = "fsl,qoriq-tmu";
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reg = <0xf0000 0x1000>;
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interrupts = <18 2 0 0>;
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fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
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fsl,tmu-calibration = <0x00000000 0x00000025
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0x00000001 0x00000028
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0x00000002 0x0000002d
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0x00000003 0x00000031
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0x00000004 0x00000036
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0x00000005 0x0000003a
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0x00000006 0x00000040
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0x00000007 0x00000044
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0x00000008 0x0000004a
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0x00000009 0x0000004f
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0x0000000a 0x00000054
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0x00010000 0x0000000d
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0x00010001 0x00000013
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0x00010002 0x00000019
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0x00010003 0x0000001f
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0x00010004 0x00000025
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0x00010005 0x0000002d
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0x00010006 0x00000033
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0x00010007 0x00000043
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0x00010008 0x0000004b
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0x00010009 0x00000053
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0x00020000 0x00000010
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0x00020001 0x00000017
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0x00020002 0x0000001f
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0x00020003 0x00000029
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0x00020004 0x00000031
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0x00020005 0x0000003c
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0x00020006 0x00000042
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0x00020007 0x0000004d
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0x00020008 0x00000056
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0x00030000 0x00000012
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0x00030001 0x0000001d>;
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#thermal-sensor-cells = <1>;
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};
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