* Rockchip PDM controller
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Required properties:
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- compatible:
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- "rockchip,px30-pdm"
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- "rockchip,rk1808-pdm"
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- "rockchip,rk3308-pdm"
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- "rockchip,rk3328-pdm"
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- "rockchip,rk3568-pdm"
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- "rockchip,rv1126-pdm"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- dmas: DMA specifiers for rx dma. See the DMA client binding,
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Documentation/devicetree/bindings/dma/dma.txt
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- dma-names: should include "rx".
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- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
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- clock-names: should contain following:
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- "pdm_hclk": clock for PDM BUS
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- "pdm_clk" : clock for PDM controller
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- resets: a list of phandle + reset-specifer paris, one for each entry in reset-names.
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- reset-names: reset names, should include "pdm-m".
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- rockchip,no-dmaengine: This is a boolean property. If present, driver will do not
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register pcm dmaengine, only just register dai. if the dai is part of multi-dais,
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the property should be present. Please refer to rockchip,multidais.txt about
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multi-dais usage.
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- pinctrl-names: Must contain a "default" entry.
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- pinctrl-N: One property must exist for each entry in
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pinctrl-names. See ../pinctrl/pinctrl-bindings.txt
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for details of the property values.
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Optional properties:
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- rockchip,path-map: This is a variable length array, that shows the mapping
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of SDIx to PATHx. By default, they are one-to-one mapping as follows:
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path0 <-- sdi0
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path1 <-- sdi1
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path2 <-- sdi2
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path3 <-- sdi3
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e.g. "rockchip,path-map = <3 2 1 0>" means the mapping as follows:
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path0 <-- sdi3
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path1 <-- sdi2
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path2 <-- sdi1
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path3 <-- sdi0
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- rockchip,mclk-calibrate: This is a boolean value, if present, enable
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clk calibrate and compenation.
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note: the corresponding property 'pdm_clk_root' should be assigned.
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Example for rk3328 PDM controller:
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pdm: pdm@ff040000 {
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compatible = "rockchip,pdm";
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reg = <0x0 0xff040000 0x0 0x1000>;
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clocks = <&clk_pdm>, <&clk_gates28 0>;
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clock-names = "pdm_clk", "pdm_hclk";
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dmas = <&pdma 16>;
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#dma-cells = <1>;
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dma-names = "rx";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&pdmm0_clk
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&pdmm0_sdi0
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&pdmm0_sdi1
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&pdmm0_sdi2
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&pdmm0_sdi3>;
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pinctrl-1 = <&pdmm0_clk_sleep
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&pdmm0_sdi0_sleep
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&pdmm0_sdi1_sleep
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&pdmm0_sdi2_sleep
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&pdmm0_sdi3_sleep>;
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};
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Example for RV1126 PDM controller with mclk-calibrate:
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&pdm {
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status = "okay";
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clocks = <&cru MCLK_PDM>, <&cru HCLK_PDM>, <&cru PLL_CPLL>;
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clock-names = "pdm_clk", "pdm_hclk", "pdm_clk_root";
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rockchip,mclk-calibrate;
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};
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