Rockchip Hardware Random Number Generator
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Required properties:
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- compatible : should be one of the following.
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"rockchip,cryptov1-rng" for crypto v1
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"rockchip,cryptov2-rng" for crypto v2
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"rockchip,trngv1" for independent trng, such as rk3588.
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- reg : Specifies base physical address and size of the registers map.
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- clocks : Phandle to clock-controller plus clock-specifier pair.
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- clock-names : "clk_crypto", "clk_crypto_apk", "aclk_crypto", "hclk_crypto" as a clock name.
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- assigned-clocks: Main clock, should be <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
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<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>
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- assigned-clock-rates : The rng core clk frequency, shall be: <150000000>, <150000000>,
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<200000000>, <100000000>
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- resets : Used for module reset
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- reset-names : Reset names, should be "reset"
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Example:
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rng: rng@100fc000 {
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compatible = "rockchip,cryptov1-rng";
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reg = <0x100fc000 0x4000>;
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clocks = <&cru SCLK_CRYPTO>, <&cru HCLK_CRYPTO>;
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clock-names = "clk_crypto", "hclk_crypto";
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assigned-clocks = <&cru SCLK_CRYPTO>, <&cru HCLK_CRYPTO>;
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assigned-clock-rates = <150000000>, <100000000>;
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resets = <&cru SRST_CRYPTO>;
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reset-names = "reset";
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status = "disabled";
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};
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rng: rng@ff2f0000 {
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compatible = "rockchip,cryptov2-rng";
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reg = <0x0 0xff2f0000 0x0 0x4000>;
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clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
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<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
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clock-names = "clk_crypto", "clk_crypto_apk",
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"aclk_crypto", "hclk_crypto";
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assigned-clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
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<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
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assigned-clock-rates = <150000000>, <150000000>,
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<200000000>, <100000000>;
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resets = <&cru SRST_CRYPTO>;
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reset-names = "reset";
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};
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