/*
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* SPDX-License-Identifier: GPL-2.0+
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* (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
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*/
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#ifndef __ROCKCHIP_DRM_TVE_H__
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#define __ROCKCHIP_DRM_TVE_H__
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#include <lcd.h>
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#define TV_CTRL (0x00)
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#define m_CVBS_MODE BIT(24)
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#define m_CLK_UPSTREAM_EN (3 << 18)
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#define m_TIMING_EN (3 << 16)
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#define m_LUMA_FILTER_GAIN (3 << 9)
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#define m_LUMA_FILTER_BW BIT(8)
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#define m_CSC_PATH (3 << 1)
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#define v_CVBS_MODE(x) ((x & 1) << 24)
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#define v_CLK_UPSTREAM_EN(x) ((x & 3) << 18)
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#define v_TIMING_EN(x) ((x & 3) << 16)
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#define v_LUMA_FILTER_GAIN(x) ((x & 3) << 9)
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#define v_LUMA_FILTER_UPSAMPLE(x) ((x & 1) << 8)
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#define v_CSC_PATH(x) ((x & 3) << 1)
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#define TV_SYNC_TIMING (0x04)
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#define TV_ACT_TIMING (0x08)
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#define TV_ADJ_TIMING (0x0c)
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#define TV_FREQ_SC (0x10)
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#define TV_LUMA_FILTER0 (0x14)
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#define TV_LUMA_FILTER1 (0x18)
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#define TV_LUMA_FILTER2 (0x1C)
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#define TV_ACT_ST (0x34)
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#define TV_ROUTING (0x38)
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#define m_DAC_SENSE_EN BIT(27)
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#define m_Y_IRE_7_5 BIT(19)
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#define m_Y_AGC_PULSE_ON BIT(15)
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#define m_Y_VIDEO_ON BIT(11)
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#define m_Y_SYNC_ON BIT(7)
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#define m_YPP_MODE BIT(3)
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#define m_MONO_EN BIT(2)
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#define m_PIC_MODE BIT(1)
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#define v_DAC_SENSE_EN(x) ((x & 1) << 27)
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#define v_Y_IRE_7_5(x) ((x & 1) << 19)
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#define v_Y_AGC_PULSE_ON(x) ((x & 1) << 15)
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#define v_Y_VIDEO_ON(x) ((x & 1) << 11)
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#define v_Y_SYNC_ON(x) ((x & 1) << 7)
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#define v_YPP_MODE(x) ((x & 1) << 3)
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#define v_MONO_EN(x) ((x & 1) << 2)
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#define v_PIC_MODE(x) ((x & 1) << 1)
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#define TV_SYNC_ADJUST (0x50)
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#define TV_STATUS (0x54)
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#define TV_RESET (0x68)
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#define m_RESET BIT(1)
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#define v_RESET(x) ((x & 1) << 1)
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#define TV_SATURATION (0x78)
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#define TV_BW_CTRL (0x8C)
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#define m_CHROMA_BW (3 << 4)
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#define m_COLOR_DIFF_BW (0xf)
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enum {
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BP_FILTER_PASS = 0,
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BP_FILTER_NTSC,
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BP_FILTER_PAL,
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};
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enum {
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COLOR_DIFF_FILTER_OFF = 0,
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COLOR_DIFF_FILTER_BW_0_6,
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COLOR_DIFF_FILTER_BW_1_3,
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COLOR_DIFF_FILTER_BW_2_0
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};
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#define v_CHROMA_BW(x) ((3 & x) << 4)
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#define v_COLOR_DIFF_BW(x) (0xF & x)
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#define TV_BRIGHTNESS_CONTRAST (0x90)
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#define m_EXTREF_EN BIT(0)
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#define m_VBG_EN BIT(1)
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#define m_DAC_EN BIT(2)
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#define m_SENSE_EN BIT(3)
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#define m_BIAS_EN (7 << 4)
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#define m_DAC_GAIN (0x3f << 7)
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#define v_DAC_GAIN(x) ((x & 0x3f) << 7)
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#define VDAC_VDAC0 (0x00)
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#define m_RST_ANA BIT(7)
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#define m_RST_DIG BIT(6)
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#define v_RST_ANA(x) ((x & 1) << 7)
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#define v_RST_DIG(x) ((x & 1) << 6)
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#define VDAC_VDAC1 (0x280)
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#define m_CUR_REG (0xf << 4)
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#define m_DR_PWR_DOWN BIT(1)
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#define m_BG_PWR_DOWN BIT(0)
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#define v_CUR_REG(x) ((x & 0xf) << 4)
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#define v_DR_PWR_DOWN(x) ((x & 1) << 1)
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#define v_BG_PWR_DOWN(x) ((x & 1) << 0)
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#define VDAC_VDAC2 (0x284)
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#define m_CUR_CTR (0X3f)
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#define v_CUR_CTR(x) ((x & 0X3f))
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#define VDAC_VDAC3 (0x288)
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#define m_CAB_EN BIT(5)
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#define m_CAB_REF BIT(4)
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#define m_CAB_FLAG BIT(0)
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#define v_CAB_EN(x) ((x & 1) << 5)
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#define v_CAB_REF(x) ((x & 1) << 4)
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#define v_CAB_FLAG(x) ((x & 1) << 0)
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enum {
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TVOUT_CVBS_NTSC = 0,
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TVOUT_CVBS_PAL,
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};
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enum {
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SOC_RK3036 = 0,
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SOC_RK312X,
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SOC_RK322X,
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SOC_RK322XH
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};
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struct drm_tve {
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void *reg_phy_base;
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int soctype;
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int test_mode;
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int saturation;
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void *vdacbase;
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int brightcontrast;
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int adjtiming;
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int lumafilter0;
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int lumafilter1;
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int lumafilter2;
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int daclevel;
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int dac1level;
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int preferred_mode;
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void *grf;
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};
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#define RK30_TVE_REGBASE 0x10118000 + 0x200
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#define MAX_TVE_COUNT 2
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#ifdef TVEDEBUG
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#define TVEDBG(format, ...) \
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printf("TVE: " format, ## __VA_ARGS__)
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#else
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#define TVEDBG(format, ...)
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#endif
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#endif /* __ROCKCHIP_DRM_TVE_H__*/
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