/*
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* VFIO platform driver specialized for AMD xgbe reset
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* reset code is inherited from AMD xgbe native driver
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*
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* Copyright (c) 2015 Linaro Ltd.
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* www.linaro.org
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <uapi/linux/mdio.h>
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#include <linux/delay.h>
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#include "vfio_platform_private.h"
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#define DMA_MR 0x3000
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#define MAC_VR 0x0110
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#define DMA_ISR 0x3008
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#define MAC_ISR 0x00b0
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#define PCS_MMD_SELECT 0xff
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#define MDIO_AN_INT 0x8002
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#define MDIO_AN_INTMASK 0x8001
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static unsigned int xmdio_read(void *ioaddr, unsigned int mmd,
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unsigned int reg)
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{
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unsigned int mmd_address, value;
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mmd_address = (mmd << 16) | ((reg) & 0xffff);
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iowrite32(mmd_address >> 8, ioaddr + (PCS_MMD_SELECT << 2));
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value = ioread32(ioaddr + ((mmd_address & 0xff) << 2));
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return value;
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}
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static void xmdio_write(void *ioaddr, unsigned int mmd,
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unsigned int reg, unsigned int value)
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{
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unsigned int mmd_address;
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mmd_address = (mmd << 16) | ((reg) & 0xffff);
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iowrite32(mmd_address >> 8, ioaddr + (PCS_MMD_SELECT << 2));
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iowrite32(value, ioaddr + ((mmd_address & 0xff) << 2));
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}
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static int vfio_platform_amdxgbe_reset(struct vfio_platform_device *vdev)
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{
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struct vfio_platform_region *xgmac_regs = &vdev->regions[0];
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struct vfio_platform_region *xpcs_regs = &vdev->regions[1];
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u32 dma_mr_value, pcs_value, value;
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unsigned int count;
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if (!xgmac_regs->ioaddr) {
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xgmac_regs->ioaddr =
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ioremap_nocache(xgmac_regs->addr, xgmac_regs->size);
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if (!xgmac_regs->ioaddr)
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return -ENOMEM;
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}
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if (!xpcs_regs->ioaddr) {
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xpcs_regs->ioaddr =
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ioremap_nocache(xpcs_regs->addr, xpcs_regs->size);
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if (!xpcs_regs->ioaddr)
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return -ENOMEM;
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}
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/* reset the PHY through MDIO*/
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pcs_value = xmdio_read(xpcs_regs->ioaddr, MDIO_MMD_PCS, MDIO_CTRL1);
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pcs_value |= MDIO_CTRL1_RESET;
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xmdio_write(xpcs_regs->ioaddr, MDIO_MMD_PCS, MDIO_CTRL1, pcs_value);
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count = 50;
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do {
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msleep(20);
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pcs_value = xmdio_read(xpcs_regs->ioaddr, MDIO_MMD_PCS,
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MDIO_CTRL1);
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} while ((pcs_value & MDIO_CTRL1_RESET) && --count);
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if (pcs_value & MDIO_CTRL1_RESET)
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pr_warn("%s XGBE PHY reset timeout\n", __func__);
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/* disable auto-negotiation */
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value = xmdio_read(xpcs_regs->ioaddr, MDIO_MMD_AN, MDIO_CTRL1);
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value &= ~MDIO_AN_CTRL1_ENABLE;
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xmdio_write(xpcs_regs->ioaddr, MDIO_MMD_AN, MDIO_CTRL1, value);
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/* disable AN IRQ */
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xmdio_write(xpcs_regs->ioaddr, MDIO_MMD_AN, MDIO_AN_INTMASK, 0);
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/* clear AN IRQ */
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xmdio_write(xpcs_regs->ioaddr, MDIO_MMD_AN, MDIO_AN_INT, 0);
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/* MAC software reset */
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dma_mr_value = ioread32(xgmac_regs->ioaddr + DMA_MR);
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dma_mr_value |= 0x1;
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iowrite32(dma_mr_value, xgmac_regs->ioaddr + DMA_MR);
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usleep_range(10, 15);
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count = 2000;
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while (--count && (ioread32(xgmac_regs->ioaddr + DMA_MR) & 1))
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usleep_range(500, 600);
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if (!count)
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pr_warn("%s MAC SW reset failed\n", __func__);
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return 0;
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}
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module_vfio_reset_handler("amd,xgbe-seattle-v1a", vfio_platform_amdxgbe_reset);
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MODULE_VERSION("0.1");
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Eric Auger <eric.auger@linaro.org>");
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MODULE_DESCRIPTION("Reset support for AMD xgbe vfio platform device");
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