// SPDX-License-Identifier: GPL-2.0
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2016 Realtek Corporation.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#include "../mp_precomp.h"
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#include "../phydm_precomp.h"
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static bool
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get_mix_mode_tx_agc_bb_swing_offset_8822b(void *dm_void,
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enum pwrtrack_method method,
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u8 rf_path, u8 tx_power_index_offset)
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{
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struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
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struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
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u8 bb_swing_upper_bound = cali_info->default_ofdm_index + 10;
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u8 bb_swing_lower_bound = 0;
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s8 tx_agc_index = 0;
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u8 tx_bb_swing_index = cali_info->default_ofdm_index;
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ODM_RT_TRACE(
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dm, ODM_COMP_TX_PWR_TRACK,
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"Path_%d cali_info->absolute_ofdm_swing_idx[rf_path]=%d, tx_power_index_offset=%d\n",
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rf_path, cali_info->absolute_ofdm_swing_idx[rf_path],
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tx_power_index_offset);
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if (tx_power_index_offset > 0XF)
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tx_power_index_offset = 0XF;
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if (cali_info->absolute_ofdm_swing_idx[rf_path] >= 0 &&
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cali_info->absolute_ofdm_swing_idx[rf_path] <=
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tx_power_index_offset) {
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tx_agc_index = cali_info->absolute_ofdm_swing_idx[rf_path];
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tx_bb_swing_index = cali_info->default_ofdm_index;
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} else if (cali_info->absolute_ofdm_swing_idx[rf_path] >
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tx_power_index_offset) {
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tx_agc_index = tx_power_index_offset;
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cali_info->remnant_ofdm_swing_idx[rf_path] =
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cali_info->absolute_ofdm_swing_idx[rf_path] -
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tx_power_index_offset;
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tx_bb_swing_index = cali_info->default_ofdm_index +
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cali_info->remnant_ofdm_swing_idx[rf_path];
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if (tx_bb_swing_index > bb_swing_upper_bound)
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tx_bb_swing_index = bb_swing_upper_bound;
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} else {
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tx_agc_index = 0;
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if (cali_info->default_ofdm_index >
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(cali_info->absolute_ofdm_swing_idx[rf_path] * (-1)))
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tx_bb_swing_index =
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cali_info->default_ofdm_index +
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cali_info->absolute_ofdm_swing_idx[rf_path];
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else
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tx_bb_swing_index = bb_swing_lower_bound;
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if (tx_bb_swing_index < bb_swing_lower_bound)
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tx_bb_swing_index = bb_swing_lower_bound;
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}
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cali_info->absolute_ofdm_swing_idx[rf_path] = tx_agc_index;
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cali_info->bb_swing_idx_ofdm[rf_path] = tx_bb_swing_index;
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ODM_RT_TRACE(
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dm, ODM_COMP_TX_PWR_TRACK,
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"MixMode Offset Path_%d cali_info->absolute_ofdm_swing_idx[rf_path]=%d cali_info->bb_swing_idx_ofdm[rf_path]=%d tx_power_index_offset=%d\n",
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rf_path, cali_info->absolute_ofdm_swing_idx[rf_path],
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cali_info->bb_swing_idx_ofdm[rf_path], tx_power_index_offset);
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return true;
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}
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void odm_tx_pwr_track_set_pwr8822b(void *dm_void, enum pwrtrack_method method,
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u8 rf_path, u8 channel_mapped_index)
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{
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struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
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struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
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u8 tx_power_index_offset = 0;
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u8 tx_power_index = 0;
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struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
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struct rtl_phy *rtlphy = &rtlpriv->phy;
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u8 channel = rtlphy->current_channel;
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u8 band_width = rtlphy->current_chan_bw;
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u8 tx_rate = 0xFF;
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if (!dm->mp_mode) {
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u16 rate = *dm->forced_data_rate;
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if (!rate) /*auto rate*/
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tx_rate = dm->tx_rate;
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else /*force rate*/
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tx_rate = (u8)rate;
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}
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ODM_RT_TRACE(dm, ODM_COMP_TX_PWR_TRACK, "Call:%s tx_rate=0x%X\n",
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__func__, tx_rate);
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ODM_RT_TRACE(dm, ODM_COMP_TX_PWR_TRACK,
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"pRF->default_ofdm_index=%d pRF->default_cck_index=%d\n",
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cali_info->default_ofdm_index,
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cali_info->default_cck_index);
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ODM_RT_TRACE(
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dm, ODM_COMP_TX_PWR_TRACK,
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"pRF->absolute_ofdm_swing_idx=%d pRF->remnant_ofdm_swing_idx=%d pRF->absolute_cck_swing_idx=%d pRF->remnant_cck_swing_idx=%d rf_path=%d\n",
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cali_info->absolute_ofdm_swing_idx[rf_path],
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cali_info->remnant_ofdm_swing_idx[rf_path],
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cali_info->absolute_cck_swing_idx[rf_path],
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cali_info->remnant_cck_swing_idx, rf_path);
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if (dm->number_linked_client != 0)
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tx_power_index = odm_get_tx_power_index(
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dm, (enum odm_rf_radio_path)rf_path, tx_rate,
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band_width, channel);
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if (tx_power_index >= 63)
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tx_power_index = 63;
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tx_power_index_offset = 63 - tx_power_index;
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ODM_RT_TRACE(dm, ODM_COMP_TX_PWR_TRACK,
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"tx_power_index=%d tx_power_index_offset=%d rf_path=%d\n",
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tx_power_index, tx_power_index_offset, rf_path);
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if (method ==
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BBSWING) { /*use for mp driver clean power tracking status*/
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switch (rf_path) {
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case ODM_RF_PATH_A:
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odm_set_bb_reg(
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dm, 0xC94, (BIT(29) | BIT(28) | BIT(27) |
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BIT(26) | BIT(25)),
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cali_info->absolute_ofdm_swing_idx[rf_path]);
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odm_set_bb_reg(
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dm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000,
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tx_scaling_table_jaguar
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[cali_info
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->bb_swing_idx_ofdm[rf_path]]);
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break;
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case ODM_RF_PATH_B:
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odm_set_bb_reg(
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dm, 0xE94, (BIT(29) | BIT(28) | BIT(27) |
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BIT(26) | BIT(25)),
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cali_info->absolute_ofdm_swing_idx[rf_path]);
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odm_set_bb_reg(
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dm, REG_B_TX_SCALE_JAGUAR, 0xFFE00000,
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tx_scaling_table_jaguar
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[cali_info
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->bb_swing_idx_ofdm[rf_path]]);
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break;
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default:
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break;
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}
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} else if (method == MIX_MODE) {
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switch (rf_path) {
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case ODM_RF_PATH_A:
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get_mix_mode_tx_agc_bb_swing_offset_8822b(
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dm, method, rf_path, tx_power_index_offset);
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odm_set_bb_reg(
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dm, 0xC94, (BIT(29) | BIT(28) | BIT(27) |
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BIT(26) | BIT(25)),
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cali_info->absolute_ofdm_swing_idx[rf_path]);
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odm_set_bb_reg(
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dm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000,
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tx_scaling_table_jaguar
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[cali_info
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->bb_swing_idx_ofdm[rf_path]]);
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ODM_RT_TRACE(
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dm, ODM_COMP_TX_PWR_TRACK,
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"TXAGC(0xC94)=0x%x BBSwing(0xc1c)=0x%x BBSwingIndex=%d rf_path=%d\n",
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odm_get_bb_reg(dm, 0xC94,
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(BIT(29) | BIT(28) | BIT(27) |
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BIT(26) | BIT(25))),
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odm_get_bb_reg(dm, 0xc1c, 0xFFE00000),
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cali_info->bb_swing_idx_ofdm[rf_path], rf_path);
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break;
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case ODM_RF_PATH_B:
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get_mix_mode_tx_agc_bb_swing_offset_8822b(
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dm, method, rf_path, tx_power_index_offset);
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odm_set_bb_reg(
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dm, 0xE94, (BIT(29) | BIT(28) | BIT(27) |
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BIT(26) | BIT(25)),
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cali_info->absolute_ofdm_swing_idx[rf_path]);
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odm_set_bb_reg(
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dm, REG_B_TX_SCALE_JAGUAR, 0xFFE00000,
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tx_scaling_table_jaguar
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[cali_info
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->bb_swing_idx_ofdm[rf_path]]);
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ODM_RT_TRACE(
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dm, ODM_COMP_TX_PWR_TRACK,
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"TXAGC(0xE94)=0x%x BBSwing(0xe1c)=0x%x BBSwingIndex=%d rf_path=%d\n",
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odm_get_bb_reg(dm, 0xE94,
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(BIT(29) | BIT(28) | BIT(27) |
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BIT(26) | BIT(25))),
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odm_get_bb_reg(dm, 0xe1c, 0xFFE00000),
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cali_info->bb_swing_idx_ofdm[rf_path], rf_path);
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break;
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default:
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break;
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}
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}
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}
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void get_delta_swing_table_8822b(void *dm_void, u8 **temperature_up_a,
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u8 **temperature_down_a, u8 **temperature_up_b,
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u8 **temperature_down_b)
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{
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struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
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struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
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struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
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struct rtl_phy *rtlphy = &rtlpriv->phy;
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u8 channel = rtlphy->current_channel;
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*temperature_up_a = cali_info->delta_swing_table_idx_2ga_p;
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*temperature_down_a = cali_info->delta_swing_table_idx_2ga_n;
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*temperature_up_b = cali_info->delta_swing_table_idx_2gb_p;
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*temperature_down_b = cali_info->delta_swing_table_idx_2gb_n;
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if (channel >= 36 && channel <= 64) {
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*temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[0];
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*temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[0];
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*temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[0];
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*temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[0];
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} else if (channel >= 100 && channel <= 144) {
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*temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[1];
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*temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[1];
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*temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[1];
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*temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[1];
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} else if (channel >= 149 && channel <= 177) {
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*temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[2];
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*temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[2];
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*temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[2];
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*temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[2];
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}
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}
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static void _phy_lc_calibrate_8822b(struct phy_dm_struct *dm)
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{
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u32 lc_cal = 0, cnt = 0;
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/*backup RF0x18*/
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lc_cal = odm_get_rf_reg(dm, ODM_RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK);
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/*Start LCK*/
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odm_set_rf_reg(dm, ODM_RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK,
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lc_cal | 0x08000);
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ODM_delay_ms(100);
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for (cnt = 0; cnt < 100; cnt++) {
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if (odm_get_rf_reg(dm, ODM_RF_PATH_A, RF_CHNLBW, 0x8000) != 0x1)
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break;
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ODM_delay_ms(10);
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}
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/*Recover channel number*/
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odm_set_rf_reg(dm, ODM_RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, lc_cal);
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}
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void phy_lc_calibrate_8822b(void *dm_void)
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{
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struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
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bool is_start_cont_tx = false, is_single_tone = false,
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is_carrier_suppression = false;
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u64 start_time;
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u64 progressing_time;
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if (is_start_cont_tx || is_single_tone || is_carrier_suppression) {
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ODM_RT_TRACE(dm, ODM_COMP_CALIBRATION,
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"[LCK]continues TX ing !!! LCK return\n");
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return;
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}
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start_time = odm_get_current_time(dm);
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_phy_lc_calibrate_8822b(dm);
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progressing_time = odm_get_progressing_time(dm, start_time);
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ODM_RT_TRACE(dm, ODM_COMP_CALIBRATION,
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"[LCK]LCK progressing_time = %lld\n", progressing_time);
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}
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void configure_txpower_track_8822b(struct txpwrtrack_cfg *config)
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{
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config->swing_table_size_cck = TXSCALE_TABLE_SIZE;
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config->swing_table_size_ofdm = TXSCALE_TABLE_SIZE;
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config->threshold_iqk = IQK_THRESHOLD;
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config->threshold_dpk = DPK_THRESHOLD;
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config->average_thermal_num = AVG_THERMAL_NUM_8822B;
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config->rf_path_count = MAX_PATH_NUM_8822B;
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config->thermal_reg_addr = RF_T_METER_8822B;
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config->odm_tx_pwr_track_set_pwr = odm_tx_pwr_track_set_pwr8822b;
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config->do_iqk = do_iqk_8822b;
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config->phy_lc_calibrate = phy_lc_calibrate_8822b;
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config->get_delta_swing_table = get_delta_swing_table_8822b;
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}
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void phy_set_rf_path_switch_8822b(struct phy_dm_struct *dm, bool is_main)
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{
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/*BY SY Request */
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odm_set_bb_reg(dm, 0x4C, (BIT(24) | BIT(23)), 0x2);
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odm_set_bb_reg(dm, 0x974, 0xff, 0xff);
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/*odm_set_bb_reg(dm, 0x1991, 0x3, 0x0);*/
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odm_set_bb_reg(dm, 0x1990, (BIT(9) | BIT(8)), 0x0);
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/*odm_set_bb_reg(dm, 0xCBE, 0x8, 0x0);*/
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odm_set_bb_reg(dm, 0xCBC, BIT(19), 0x0);
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odm_set_bb_reg(dm, 0xCB4, 0xff, 0x77);
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odm_set_bb_reg(dm, 0x70, MASKBYTE3, 0x0e);
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odm_set_bb_reg(dm, 0x1704, MASKDWORD, 0x0000ff00);
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odm_set_bb_reg(dm, 0x1700, MASKDWORD, 0xc00f0038);
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if (is_main) {
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/*odm_set_bb_reg(dm, 0xCBD, 0x3, 0x2); WiFi */
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odm_set_bb_reg(dm, 0xCBC, (BIT(9) | BIT(8)), 0x2); /*WiFi */
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} else {
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/*odm_set_bb_reg(dm, 0xCBD, 0x3, 0x1); BT*/
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odm_set_bb_reg(dm, 0xCBC, (BIT(9) | BIT(8)), 0x1); /*BT*/
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}
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}
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