/*
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*
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* Copyright 2020 Rockchip Electronics Co. LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __HAL_H265D_COM_H__
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#define __HAL_H265D_COM_H__
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#include "rk_type.h"
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#define SCALING_LIST_SIZE (81 * 1360)
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#define RPS_SIZE (600 * 32)
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#define SCALING_LIST_SIZE_NUM 4
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#define L0 0
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#define L1 1
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#define MAX_REFS 16
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#define IS_IDR(nal_type) (nal_type == 19 || nal_type == 20)
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#define IS_BLA(nal_type) (nal_type == 17 || nal_type == 16 || nal_type == 18)
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#define IS_IRAP(nal_type) (nal_type >= 16 && nal_type <= 23)
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enum RPSType {
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ST_CURR_BEF = 0,
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ST_CURR_AFT,
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ST_FOLL,
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LT_CURR,
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LT_FOLL,
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NB_RPS_TYPE,
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};
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enum SliceType {
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B_SLICE = 0,
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P_SLICE = 1,
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I_SLICE = 2,
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};
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typedef struct slice_ref_map {
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RK_U8 dpb_index;
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RK_U8 is_long_term;
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} slice_ref_map_t;
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typedef struct ShortTermRPS {
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RK_U32 num_negative_pics;
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RK_S32 num_delta_pocs;
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RK_S32 delta_poc[32];
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RK_U8 used[32];
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} ShortTermRPS;
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typedef struct LongTermRPS {
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RK_S32 poc[32];
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RK_U8 used[32];
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RK_U8 nb_refs;
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} LongTermRPS;
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typedef struct RefPicList {
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RK_U32 dpb_index[MAX_REFS];
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RK_U32 nb_refs;
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} RefPicList_t;
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typedef struct RefPicListTab {
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RefPicList_t refPicList[2];
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} RefPicListTab_t;
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typedef struct SliceHeader {
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RK_U32 pps_id;
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///< address (in raster order) of the first block in the current slice segment
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RK_U32 slice_segment_addr;
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///< address (in raster order) of the first block in the current slice
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RK_U32 slice_addr;
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enum SliceType slice_type;
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RK_S32 pic_order_cnt_lsb;
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RK_U8 first_slice_in_pic_flag;
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RK_U8 dependent_slice_segment_flag;
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RK_U8 pic_output_flag;
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RK_U8 colour_plane_id;
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///< RPS coded in the slice header itself is stored here
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ShortTermRPS slice_rps;
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const ShortTermRPS *short_term_rps;
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LongTermRPS long_term_rps;
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RK_U32 list_entry_lx[2][32];
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RK_U8 rpl_modification_flag[2];
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RK_U8 no_output_of_prior_pics_flag;
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RK_U8 slice_temporal_mvp_enabled_flag;
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RK_U32 nb_refs[2];
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RK_U8 slice_sample_adaptive_offset_flag[3];
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RK_U8 mvd_l1_zero_flag;
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RK_U8 cabac_init_flag;
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RK_U8 disable_deblocking_filter_flag; ///< slice_header_disable_deblocking_filter_flag
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RK_U8 slice_loop_filter_across_slices_enabled_flag;
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RK_U8 collocated_list;
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RK_U32 collocated_ref_idx;
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RK_S32 slice_qp_delta;
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RK_S32 slice_cb_qp_offset;
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RK_S32 slice_cr_qp_offset;
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RK_S32 beta_offset; ///< beta_offset_div2 * 2
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RK_S32 tc_offset; ///< tc_offset_div2 * 2
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RK_U32 max_num_merge_cand; ///< 5 - 5_minus_max_num_merge_cand
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RK_S32 *entry_point_offset;
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RK_S32 * offset;
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RK_S32 * size;
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RK_S32 num_entry_point_offsets;
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RK_S8 slice_qp;
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RK_U8 luma_log2_weight_denom;
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RK_S16 chroma_log2_weight_denom;
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RK_S32 slice_ctb_addr_rs;
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} SliceHeader_t;
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extern RK_U8 hal_hevc_diag_scan4x4_x[16];
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extern RK_U8 hal_hevc_diag_scan4x4_y[16];
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extern RK_U8 hal_hevc_diag_scan8x8_x[64];
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extern RK_U8 hal_hevc_diag_scan8x8_y[64];
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extern RK_U8 cabac_table[27456];
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#ifdef __cplusplus
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extern "C" {
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#endif
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RK_U32 hevc_ver_align(RK_U32 val);
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RK_U32 hevc_hor_align(RK_U32 val);
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void hal_record_scaling_list(scalingFactor_t *pScalingFactor_out, scalingList_t *pScalingList);
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RK_S32 hal_h265d_slice_hw_rps(void *dxva, void *rps_buf, void* sw_rps_buf, RK_U32 fast_mode);
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RK_S32 hal_h265d_slice_output_rps(void *dxva, void *rps_buf);
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void hal_h265d_output_scalinglist_packet(void *hal, void *ptr, void *dxva);
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#ifdef __cplusplus
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}
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#endif
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#endif /*__HAL_H265D_COM_H__*/
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