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<title>GNU Compiler Collection (GCC) Internals: Allocation Order</title>
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<a name="Allocation-Order"></a>
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<p>
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Next: <a href="Values-in-Registers.html#Values-in-Registers" accesskey="n" rel="next">Values in Registers</a>, Previous: <a href="Register-Basics.html#Register-Basics" accesskey="p" rel="prev">Register Basics</a>, Up: <a href="Registers.html#Registers" accesskey="u" rel="up">Registers</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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<a name="Order-of-Allocation-of-Registers"></a>
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<h4 class="subsection">17.7.2 Order of Allocation of Registers</h4>
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<a name="index-order-of-register-allocation"></a>
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<a name="index-register-allocation-order"></a>
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<p>Registers are allocated in order.
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</p>
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<dl>
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<dt><a name="index-REG_005fALLOC_005fORDER"></a>Macro: <strong>REG_ALLOC_ORDER</strong></dt>
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<dd><p>If defined, an initializer for a vector of integers, containing the
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numbers of hard registers in the order in which GCC should prefer
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to use them (from most preferred to least).
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</p>
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<p>If this macro is not defined, registers are used lowest numbered first
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(all else being equal).
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</p>
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<p>One use of this macro is on machines where the highest numbered
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registers must always be saved and the save-multiple-registers
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instruction supports only sequences of consecutive registers. On such
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machines, define <code>REG_ALLOC_ORDER</code> to be an initializer that lists
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the highest numbered allocable register first.
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</p></dd></dl>
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<dl>
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<dt><a name="index-ADJUST_005fREG_005fALLOC_005fORDER"></a>Macro: <strong>ADJUST_REG_ALLOC_ORDER</strong></dt>
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<dd><p>A C statement (sans semicolon) to choose the order in which to allocate
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hard registers for pseudo-registers local to a basic block.
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</p>
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<p>Store the desired register order in the array <code>reg_alloc_order</code>.
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Element 0 should be the register to allocate first; element 1, the next
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register; and so on.
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</p>
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<p>The macro body should not assume anything about the contents of
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<code>reg_alloc_order</code> before execution of the macro.
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</p>
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<p>On most machines, it is not necessary to define this macro.
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</p></dd></dl>
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<dl>
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<dt><a name="index-HONOR_005fREG_005fALLOC_005fORDER"></a>Macro: <strong>HONOR_REG_ALLOC_ORDER</strong></dt>
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<dd><p>Normally, IRA tries to estimate the costs for saving a register in the
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prologue and restoring it in the epilogue. This discourages it from
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using call-saved registers. If a machine wants to ensure that IRA
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allocates registers in the order given by REG_ALLOC_ORDER even if some
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call-saved registers appear earlier than call-used ones, then define this
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macro as a C expression to nonzero. Default is 0.
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</p></dd></dl>
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<dl>
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<dt><a name="index-IRA_005fHARD_005fREGNO_005fADD_005fCOST_005fMULTIPLIER"></a>Macro: <strong>IRA_HARD_REGNO_ADD_COST_MULTIPLIER</strong> <em>(<var>regno</var>)</em></dt>
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<dd><p>In some case register allocation order is not enough for the
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Integrated Register Allocator (<acronym>IRA</acronym>) to generate a good code.
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If this macro is defined, it should return a floating point value
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based on <var>regno</var>. The cost of using <var>regno</var> for a pseudo will
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be increased by approximately the pseudo’s usage frequency times the
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value returned by this macro. Not defining this macro is equivalent
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to having it always return <code>0.0</code>.
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</p>
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<p>On most machines, it is not necessary to define this macro.
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</p></dd></dl>
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Next: <a href="Values-in-Registers.html#Values-in-Registers" accesskey="n" rel="next">Values in Registers</a>, Previous: <a href="Register-Basics.html#Register-Basics" accesskey="p" rel="prev">Register Basics</a>, Up: <a href="Registers.html#Registers" accesskey="u" rel="up">Registers</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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