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<title>Using the GNU Compiler Collection (GCC): PowerPC Built-in Functions</title>
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<a name="PowerPC-Built_002din-Functions"></a>
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<div class="header">
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<p>
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Next: <a href="PowerPC-AltiVec_002fVSX-Built_002din-Functions.html#PowerPC-AltiVec_002fVSX-Built_002din-Functions" accesskey="n" rel="next">PowerPC AltiVec/VSX Built-in Functions</a>, Previous: <a href="picoChip-Built_002din-Functions.html#picoChip-Built_002din-Functions" accesskey="p" rel="prev">picoChip Built-in Functions</a>, Up: <a href="Target-Builtins.html#Target-Builtins" accesskey="u" rel="up">Target Builtins</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="PowerPC-Built_002din-Functions-1"></a>
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<h4 class="subsection">6.59.20 PowerPC Built-in Functions</h4>
|
|
<p>The following built-in functions are always available and can be used to
|
check the PowerPC target platform type:
|
</p>
|
<dl>
|
<dt><a name="index-_005f_005fbuiltin_005fcpu_005finit"></a>Built-in Function: <em>void</em> <strong>__builtin_cpu_init</strong> <em>(void)</em></dt>
|
<dd><p>This function is a <code>nop</code> on the PowerPC platform and is included solely
|
to maintain API compatibility with the x86 builtins.
|
</p></dd></dl>
|
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<dl>
|
<dt><a name="index-_005f_005fbuiltin_005fcpu_005fis"></a>Built-in Function: <em>int</em> <strong>__builtin_cpu_is</strong> <em>(const char *<var>cpuname</var>)</em></dt>
|
<dd><p>This function returns a value of <code>1</code> if the run-time CPU is of type
|
<var>cpuname</var> and returns <code>0</code> otherwise. The following CPU names can be
|
detected:
|
</p>
|
<dl compact="compact">
|
<dt>‘<samp>power9</samp>’</dt>
|
<dd><p>IBM POWER9 Server CPU.
|
</p></dd>
|
<dt>‘<samp>power8</samp>’</dt>
|
<dd><p>IBM POWER8 Server CPU.
|
</p></dd>
|
<dt>‘<samp>power7</samp>’</dt>
|
<dd><p>IBM POWER7 Server CPU.
|
</p></dd>
|
<dt>‘<samp>power6x</samp>’</dt>
|
<dd><p>IBM POWER6 Server CPU (RAW mode).
|
</p></dd>
|
<dt>‘<samp>power6</samp>’</dt>
|
<dd><p>IBM POWER6 Server CPU (Architected mode).
|
</p></dd>
|
<dt>‘<samp>power5+</samp>’</dt>
|
<dd><p>IBM POWER5+ Server CPU.
|
</p></dd>
|
<dt>‘<samp>power5</samp>’</dt>
|
<dd><p>IBM POWER5 Server CPU.
|
</p></dd>
|
<dt>‘<samp>ppc970</samp>’</dt>
|
<dd><p>IBM 970 Server CPU (ie, Apple G5).
|
</p></dd>
|
<dt>‘<samp>power4</samp>’</dt>
|
<dd><p>IBM POWER4 Server CPU.
|
</p></dd>
|
<dt>‘<samp>ppca2</samp>’</dt>
|
<dd><p>IBM A2 64-bit Embedded CPU
|
</p></dd>
|
<dt>‘<samp>ppc476</samp>’</dt>
|
<dd><p>IBM PowerPC 476FP 32-bit Embedded CPU.
|
</p></dd>
|
<dt>‘<samp>ppc464</samp>’</dt>
|
<dd><p>IBM PowerPC 464 32-bit Embedded CPU.
|
</p></dd>
|
<dt>‘<samp>ppc440</samp>’</dt>
|
<dd><p>PowerPC 440 32-bit Embedded CPU.
|
</p></dd>
|
<dt>‘<samp>ppc405</samp>’</dt>
|
<dd><p>PowerPC 405 32-bit Embedded CPU.
|
</p></dd>
|
<dt>‘<samp>ppc-cell-be</samp>’</dt>
|
<dd><p>IBM PowerPC Cell Broadband Engine Architecture CPU.
|
</p></dd>
|
</dl>
|
|
<p>Here is an example:
|
</p><div class="smallexample">
|
<pre class="smallexample">if (__builtin_cpu_is ("power8"))
|
{
|
do_power8 (); // POWER8 specific implementation.
|
}
|
else
|
{
|
do_generic (); // Generic implementation.
|
}
|
</pre></div>
|
</dd></dl>
|
|
<dl>
|
<dt><a name="index-_005f_005fbuiltin_005fcpu_005fsupports"></a>Built-in Function: <em>int</em> <strong>__builtin_cpu_supports</strong> <em>(const char *<var>feature</var>)</em></dt>
|
<dd><p>This function returns a value of <code>1</code> if the run-time CPU supports the HWCAP
|
feature <var>feature</var> and returns <code>0</code> otherwise. The following features can be
|
detected:
|
</p>
|
<dl compact="compact">
|
<dt>‘<samp>4xxmac</samp>’</dt>
|
<dd><p>4xx CPU has a Multiply Accumulator.
|
</p></dd>
|
<dt>‘<samp>altivec</samp>’</dt>
|
<dd><p>CPU has a SIMD/Vector Unit.
|
</p></dd>
|
<dt>‘<samp>arch_2_05</samp>’</dt>
|
<dd><p>CPU supports ISA 2.05 (eg, POWER6)
|
</p></dd>
|
<dt>‘<samp>arch_2_06</samp>’</dt>
|
<dd><p>CPU supports ISA 2.06 (eg, POWER7)
|
</p></dd>
|
<dt>‘<samp>arch_2_07</samp>’</dt>
|
<dd><p>CPU supports ISA 2.07 (eg, POWER8)
|
</p></dd>
|
<dt>‘<samp>arch_3_00</samp>’</dt>
|
<dd><p>CPU supports ISA 3.00 (eg, POWER9)
|
</p></dd>
|
<dt>‘<samp>archpmu</samp>’</dt>
|
<dd><p>CPU supports the set of compatible performance monitoring events.
|
</p></dd>
|
<dt>‘<samp>booke</samp>’</dt>
|
<dd><p>CPU supports the Embedded ISA category.
|
</p></dd>
|
<dt>‘<samp>cellbe</samp>’</dt>
|
<dd><p>CPU has a CELL broadband engine.
|
</p></dd>
|
<dt>‘<samp>dfp</samp>’</dt>
|
<dd><p>CPU has a decimal floating point unit.
|
</p></dd>
|
<dt>‘<samp>dscr</samp>’</dt>
|
<dd><p>CPU supports the data stream control register.
|
</p></dd>
|
<dt>‘<samp>ebb</samp>’</dt>
|
<dd><p>CPU supports event base branching.
|
</p></dd>
|
<dt>‘<samp>efpdouble</samp>’</dt>
|
<dd><p>CPU has a SPE double precision floating point unit.
|
</p></dd>
|
<dt>‘<samp>efpsingle</samp>’</dt>
|
<dd><p>CPU has a SPE single precision floating point unit.
|
</p></dd>
|
<dt>‘<samp>fpu</samp>’</dt>
|
<dd><p>CPU has a floating point unit.
|
</p></dd>
|
<dt>‘<samp>htm</samp>’</dt>
|
<dd><p>CPU has hardware transaction memory instructions.
|
</p></dd>
|
<dt>‘<samp>htm-nosc</samp>’</dt>
|
<dd><p>Kernel aborts hardware transactions when a syscall is made.
|
</p></dd>
|
<dt>‘<samp>ic_snoop</samp>’</dt>
|
<dd><p>CPU supports icache snooping capabilities.
|
</p></dd>
|
<dt>‘<samp>ieee128</samp>’</dt>
|
<dd><p>CPU supports 128-bit IEEE binary floating point instructions.
|
</p></dd>
|
<dt>‘<samp>isel</samp>’</dt>
|
<dd><p>CPU supports the integer select instruction.
|
</p></dd>
|
<dt>‘<samp>mmu</samp>’</dt>
|
<dd><p>CPU has a memory management unit.
|
</p></dd>
|
<dt>‘<samp>notb</samp>’</dt>
|
<dd><p>CPU does not have a timebase (eg, 601 and 403gx).
|
</p></dd>
|
<dt>‘<samp>pa6t</samp>’</dt>
|
<dd><p>CPU supports the PA Semi 6T CORE ISA.
|
</p></dd>
|
<dt>‘<samp>power4</samp>’</dt>
|
<dd><p>CPU supports ISA 2.00 (eg, POWER4)
|
</p></dd>
|
<dt>‘<samp>power5</samp>’</dt>
|
<dd><p>CPU supports ISA 2.02 (eg, POWER5)
|
</p></dd>
|
<dt>‘<samp>power5+</samp>’</dt>
|
<dd><p>CPU supports ISA 2.03 (eg, POWER5+)
|
</p></dd>
|
<dt>‘<samp>power6x</samp>’</dt>
|
<dd><p>CPU supports ISA 2.05 (eg, POWER6) extended opcodes mffgpr and mftgpr.
|
</p></dd>
|
<dt>‘<samp>ppc32</samp>’</dt>
|
<dd><p>CPU supports 32-bit mode execution.
|
</p></dd>
|
<dt>‘<samp>ppc601</samp>’</dt>
|
<dd><p>CPU supports the old POWER ISA (eg, 601)
|
</p></dd>
|
<dt>‘<samp>ppc64</samp>’</dt>
|
<dd><p>CPU supports 64-bit mode execution.
|
</p></dd>
|
<dt>‘<samp>ppcle</samp>’</dt>
|
<dd><p>CPU supports a little-endian mode that uses address swizzling.
|
</p></dd>
|
<dt>‘<samp>smt</samp>’</dt>
|
<dd><p>CPU support simultaneous multi-threading.
|
</p></dd>
|
<dt>‘<samp>spe</samp>’</dt>
|
<dd><p>CPU has a signal processing extension unit.
|
</p></dd>
|
<dt>‘<samp>tar</samp>’</dt>
|
<dd><p>CPU supports the target address register.
|
</p></dd>
|
<dt>‘<samp>true_le</samp>’</dt>
|
<dd><p>CPU supports true little-endian mode.
|
</p></dd>
|
<dt>‘<samp>ucache</samp>’</dt>
|
<dd><p>CPU has unified I/D cache.
|
</p></dd>
|
<dt>‘<samp>vcrypto</samp>’</dt>
|
<dd><p>CPU supports the vector cryptography instructions.
|
</p></dd>
|
<dt>‘<samp>vsx</samp>’</dt>
|
<dd><p>CPU supports the vector-scalar extension.
|
</p></dd>
|
</dl>
|
|
<p>Here is an example:
|
</p><div class="smallexample">
|
<pre class="smallexample">if (__builtin_cpu_supports ("fpu"))
|
{
|
asm("fadd %0,%1,%2" : "=d"(dst) : "d"(src1), "d"(src2));
|
}
|
else
|
{
|
dst = __fadd (src1, src2); // Software FP addition function.
|
}
|
</pre></div>
|
</dd></dl>
|
|
<p>These built-in functions are available for the PowerPC family of
|
processors:
|
</p><div class="smallexample">
|
<pre class="smallexample">float __builtin_recipdivf (float, float);
|
float __builtin_rsqrtf (float);
|
double __builtin_recipdiv (double, double);
|
double __builtin_rsqrt (double);
|
uint64_t __builtin_ppc_get_timebase ();
|
unsigned long __builtin_ppc_mftb ();
|
double __builtin_unpack_longdouble (long double, int);
|
long double __builtin_pack_longdouble (double, double);
|
</pre></div>
|
|
<p>The <code>vec_rsqrt</code>, <code>__builtin_rsqrt</code>, and
|
<code>__builtin_rsqrtf</code> functions generate multiple instructions to
|
implement the reciprocal sqrt functionality using reciprocal sqrt
|
estimate instructions.
|
</p>
|
<p>The <code>__builtin_recipdiv</code>, and <code>__builtin_recipdivf</code>
|
functions generate multiple instructions to implement division using
|
the reciprocal estimate instructions.
|
</p>
|
<p>The <code>__builtin_ppc_get_timebase</code> and <code>__builtin_ppc_mftb</code>
|
functions generate instructions to read the Time Base Register. The
|
<code>__builtin_ppc_get_timebase</code> function may generate multiple
|
instructions and always returns the 64 bits of the Time Base Register.
|
The <code>__builtin_ppc_mftb</code> function always generates one instruction and
|
returns the Time Base Register value as an unsigned long, throwing away
|
the most significant word on 32-bit environments.
|
</p>
|
<p>Additional built-in functions are available for the 64-bit PowerPC
|
family of processors, for efficient use of 128-bit floating point
|
(<code>__float128</code>) values.
|
</p>
|
<p>The following floating-point built-in functions are available with
|
<code>-mfloat128</code> and Altivec support. All of them implement the
|
function that is part of the name.
|
</p>
|
<div class="smallexample">
|
<pre class="smallexample">__float128 __builtin_fabsq (__float128)
|
__float128 __builtin_copysignq (__float128, __float128)
|
</pre></div>
|
|
<p>The following built-in functions are available with <code>-mfloat128</code>
|
and Altivec support.
|
</p>
|
<dl compact="compact">
|
<dt><code>__float128 __builtin_infq (void)</code></dt>
|
<dd><p>Similar to <code>__builtin_inf</code>, except the return type is <code>__float128</code>.
|
<a name="index-_005f_005fbuiltin_005finfq"></a>
|
</p>
|
</dd>
|
<dt><code>__float128 __builtin_huge_valq (void)</code></dt>
|
<dd><p>Similar to <code>__builtin_huge_val</code>, except the return type is <code>__float128</code>.
|
<a name="index-_005f_005fbuiltin_005fhuge_005fvalq"></a>
|
</p>
|
</dd>
|
<dt><code>__float128 __builtin_nanq (void)</code></dt>
|
<dd><p>Similar to <code>__builtin_nan</code>, except the return type is <code>__float128</code>.
|
<a name="index-_005f_005fbuiltin_005fnanq"></a>
|
</p>
|
</dd>
|
<dt><code>__float128 __builtin_nansq (void)</code></dt>
|
<dd><p>Similar to <code>__builtin_nans</code>, except the return type is <code>__float128</code>.
|
<a name="index-_005f_005fbuiltin_005fnansq"></a>
|
</p></dd>
|
</dl>
|
|
<p>The following built-in functions are available for the PowerPC family
|
of processors, starting with ISA 2.06 or later (<samp>-mcpu=power7</samp>
|
or <samp>-mpopcntd</samp>):
|
</p><div class="smallexample">
|
<pre class="smallexample">long __builtin_bpermd (long, long);
|
int __builtin_divwe (int, int);
|
int __builtin_divweo (int, int);
|
unsigned int __builtin_divweu (unsigned int, unsigned int);
|
unsigned int __builtin_divweuo (unsigned int, unsigned int);
|
long __builtin_divde (long, long);
|
long __builtin_divdeo (long, long);
|
unsigned long __builtin_divdeu (unsigned long, unsigned long);
|
unsigned long __builtin_divdeuo (unsigned long, unsigned long);
|
unsigned int cdtbcd (unsigned int);
|
unsigned int cbcdtd (unsigned int);
|
unsigned int addg6s (unsigned int, unsigned int);
|
</pre></div>
|
|
<p>The <code>__builtin_divde</code>, <code>__builtin_divdeo</code>,
|
<code>__builtin_divdeu</code>, <code>__builtin_divdeou</code> functions require a
|
64-bit environment support ISA 2.06 or later.
|
</p>
|
<p>The following built-in functions are available for the PowerPC family
|
of processors, starting with ISA 3.0 or later (<samp>-mcpu=power9</samp>):
|
</p><div class="smallexample">
|
<pre class="smallexample">long long __builtin_darn (void);
|
long long __builtin_darn_raw (void);
|
int __builtin_darn_32 (void);
|
|
int __builtin_dfp_dtstsfi_lt (unsigned int comparison, _Decimal64 value);
|
int __builtin_dfp_dtstsfi_lt (unsigned int comparison, _Decimal128 value);
|
int __builtin_dfp_dtstsfi_lt_dd (unsigned int comparison, _Decimal64 value);
|
int __builtin_dfp_dtstsfi_lt_td (unsigned int comparison, _Decimal128 value);
|
|
int __builtin_dfp_dtstsfi_gt (unsigned int comparison, _Decimal64 value);
|
int __builtin_dfp_dtstsfi_gt (unsigned int comparison, _Decimal128 value);
|
int __builtin_dfp_dtstsfi_gt_dd (unsigned int comparison, _Decimal64 value);
|
int __builtin_dfp_dtstsfi_gt_td (unsigned int comparison, _Decimal128 value);
|
|
int __builtin_dfp_dtstsfi_eq (unsigned int comparison, _Decimal64 value);
|
int __builtin_dfp_dtstsfi_eq (unsigned int comparison, _Decimal128 value);
|
int __builtin_dfp_dtstsfi_eq_dd (unsigned int comparison, _Decimal64 value);
|
int __builtin_dfp_dtstsfi_eq_td (unsigned int comparison, _Decimal128 value);
|
|
int __builtin_dfp_dtstsfi_ov (unsigned int comparison, _Decimal64 value);
|
int __builtin_dfp_dtstsfi_ov (unsigned int comparison, _Decimal128 value);
|
int __builtin_dfp_dtstsfi_ov_dd (unsigned int comparison, _Decimal64 value);
|
int __builtin_dfp_dtstsfi_ov_td (unsigned int comparison, _Decimal128 value);
|
</pre></div>
|
|
<p>The <code>__builtin_darn</code> and <code>__builtin_darn_raw</code>
|
functions require a
|
64-bit environment supporting ISA 3.0 or later.
|
The <code>__builtin_darn</code> function provides a 64-bit conditioned
|
random number. The <code>__builtin_darn_raw</code> function provides a
|
64-bit raw random number. The <code>__builtin_darn_32</code> function
|
provides a 32-bit random number.
|
</p>
|
<p>The <code>__builtin_dfp_dtstsfi_lt</code> function returns a non-zero value
|
if and only if the number of signficant digits of its <code>value</code> argument
|
is less than its <code>comparison</code> argument. The
|
<code>__builtin_dfp_dtstsfi_lt_dd</code> and
|
<code>__builtin_dfp_dtstsfi_lt_td</code> functions behave similarly, but
|
require that the type of the <code>value</code> argument be
|
<code>__Decimal64</code> and <code>__Decimal128</code> respectively.
|
</p>
|
<p>The <code>__builtin_dfp_dtstsfi_gt</code> function returns a non-zero value
|
if and only if the number of signficant digits of its <code>value</code> argument
|
is greater than its <code>comparison</code> argument. The
|
<code>__builtin_dfp_dtstsfi_gt_dd</code> and
|
<code>__builtin_dfp_dtstsfi_gt_td</code> functions behave similarly, but
|
require that the type of the <code>value</code> argument be
|
<code>__Decimal64</code> and <code>__Decimal128</code> respectively.
|
</p>
|
<p>The <code>__builtin_dfp_dtstsfi_eq</code> function returns a non-zero value
|
if and only if the number of signficant digits of its <code>value</code> argument
|
equals its <code>comparison</code> argument. The
|
<code>__builtin_dfp_dtstsfi_eq_dd</code> and
|
<code>__builtin_dfp_dtstsfi_eq_td</code> functions behave similarly, but
|
require that the type of the <code>value</code> argument be
|
<code>__Decimal64</code> and <code>__Decimal128</code> respectively.
|
</p>
|
<p>The <code>__builtin_dfp_dtstsfi_ov</code> function returns a non-zero value
|
if and only if its <code>value</code> argument has an undefined number of
|
significant digits, such as when <code>value</code> is an encoding of <code>NaN</code>.
|
The <code>__builtin_dfp_dtstsfi_ov_dd</code> and
|
<code>__builtin_dfp_dtstsfi_ov_td</code> functions behave similarly, but
|
require that the type of the <code>value</code> argument be
|
<code>__Decimal64</code> and <code>__Decimal128</code> respectively.
|
</p>
|
<p>The following built-in functions are available for the PowerPC family
|
of processors when hardware decimal floating point
|
(<samp>-mhard-dfp</samp>) is available:
|
</p><div class="smallexample">
|
<pre class="smallexample">long long __builtin_dxex (_Decimal64);
|
long long __builtin_dxexq (_Decimal128);
|
_Decimal64 __builtin_ddedpd (int, _Decimal64);
|
_Decimal128 __builtin_ddedpdq (int, _Decimal128);
|
_Decimal64 __builtin_denbcd (int, _Decimal64);
|
_Decimal128 __builtin_denbcdq (int, _Decimal128);
|
_Decimal64 __builtin_diex (long long, _Decimal64);
|
_Decimal128 _builtin_diexq (long long, _Decimal128);
|
_Decimal64 __builtin_dscli (_Decimal64, int);
|
_Decimal128 __builtin_dscliq (_Decimal128, int);
|
_Decimal64 __builtin_dscri (_Decimal64, int);
|
_Decimal128 __builtin_dscriq (_Decimal128, int);
|
unsigned long long __builtin_unpack_dec128 (_Decimal128, int);
|
_Decimal128 __builtin_pack_dec128 (unsigned long long, unsigned long long);
|
</pre></div>
|
|
<p>The following built-in functions are available for the PowerPC family
|
of processors when the Vector Scalar (vsx) instruction set is
|
available:
|
</p><div class="smallexample">
|
<pre class="smallexample">unsigned long long __builtin_unpack_vector_int128 (vector __int128_t, int);
|
vector __int128_t __builtin_pack_vector_int128 (unsigned long long,
|
unsigned long long);
|
</pre></div>
|
|
<hr>
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<div class="header">
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<p>
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Next: <a href="PowerPC-AltiVec_002fVSX-Built_002din-Functions.html#PowerPC-AltiVec_002fVSX-Built_002din-Functions" accesskey="n" rel="next">PowerPC AltiVec/VSX Built-in Functions</a>, Previous: <a href="picoChip-Built_002din-Functions.html#picoChip-Built_002din-Functions" accesskey="p" rel="prev">picoChip Built-in Functions</a>, Up: <a href="Target-Builtins.html#Target-Builtins" accesskey="u" rel="up">Target Builtins</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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