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<title>Using as: Opcodes for i860</title>
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<a name="Opcodes-for-i860"></a>
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<p>
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Next: <a href="Syntax-of-i860.html#Syntax-of-i860" accesskey="n" rel="next">Syntax of i860</a>, Previous: <a href="Directives_002di860.html#Directives_002di860" accesskey="p" rel="prev">Directives-i860</a>, Up: <a href="i860_002dDependent.html#i860_002dDependent" accesskey="u" rel="up">i860-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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<a name="i860-Opcodes"></a>
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<h4 class="subsection">9.16.4 i860 Opcodes</h4>
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<a name="index-opcodes_002c-i860"></a>
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<a name="index-i860-opcodes"></a>
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<p>All of the Intel i860XR and i860XP machine instructions are supported. Please see
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either <em>i860 Microprocessor Programmer’s Reference Manual</em> or <em>i860 Microprocessor Architecture</em> for more information.
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</p><a name="Other-instruction-support-_0028pseudo_002dinstructions_0029"></a>
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<h4 class="subsubsection">9.16.4.1 Other instruction support (pseudo-instructions)</h4>
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<p>For compatibility with some other i860 assemblers, a number of
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pseudo-instructions are supported. While these are supported, they are
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a very undesirable feature that should be avoided – in particular, when
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they result in an expansion to multiple actual i860 instructions. Below
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are the pseudo-instructions that result in expansions.
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</p><ul>
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<li> Load large immediate into general register:
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<p>The pseudo-instruction <code>mov imm,%rn</code> (where the immediate does
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not fit within a signed 16-bit field) will be expanded into:
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</p><div class="smallexample">
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<pre class="smallexample">orh large_imm@h,%r0,%rn
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or large_imm@l,%rn,%rn
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</pre></div>
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</li><li> Load/store with relocatable address expression:
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<p>For example, the pseudo-instruction <code>ld.b addr_exp(%rx),%rn</code>
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will be expanded into:
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</p><div class="smallexample">
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<pre class="smallexample">orh addr_exp@ha,%rx,%r31
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ld.l addr_exp@l(%r31),%rn
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</pre></div>
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<p>The analogous expansions apply to <code>ld.x, st.x, fld.x, pfld.x, fst.x</code>, and <code>pst.x</code> as well.
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</p></li><li> Signed large immediate with add/subtract:
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<p>If any of the arithmetic operations <code>adds, addu, subs, subu</code> are used
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with an immediate larger than 16-bits (signed), then they will be expanded.
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For instance, the pseudo-instruction <code>adds large_imm,%rx,%rn</code> expands to:
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</p><div class="smallexample">
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<pre class="smallexample">orh large_imm@h,%r0,%r31
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or large_imm@l,%r31,%r31
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adds %r31,%rx,%rn
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</pre></div>
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</li><li> Unsigned large immediate with logical operations:
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<p>Logical operations (<code>or, andnot, or, xor</code>) also result in expansions.
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The pseudo-instruction <code>or large_imm,%rx,%rn</code> results in:
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</p><div class="smallexample">
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<pre class="smallexample">orh large_imm@h,%rx,%r31
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or large_imm@l,%r31,%rn
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</pre></div>
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<p>Similarly for the others, except for <code>and</code> which expands to:
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</p><div class="smallexample">
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<pre class="smallexample">andnot (-1 - large_imm)@h,%rx,%r31
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andnot (-1 - large_imm)@l,%r31,%rn
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</pre></div>
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</li></ul>
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Next: <a href="Syntax-of-i860.html#Syntax-of-i860" accesskey="n" rel="next">Syntax of i860</a>, Previous: <a href="Directives_002di860.html#Directives_002di860" accesskey="p" rel="prev">Directives-i860</a>, Up: <a href="i860_002dDependent.html#i860_002dDependent" accesskey="u" rel="up">i860-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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