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<title>Using as: s390 Mnemonics</title>
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<a name="s390-Mnemonics"></a>
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<p>
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Next: <a href="s390-Operands.html#s390-Operands" accesskey="n" rel="next">s390 Operands</a>, Previous: <a href="s390-Register.html#s390-Register" accesskey="p" rel="previous">s390 Register</a>, Up: <a href="s390-Syntax.html#s390-Syntax" accesskey="u" rel="up">s390 Syntax</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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<a name="Instruction-Mnemonics"></a>
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<h4 class="subsubsection">9.41.3.2 Instruction Mnemonics</h4>
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<a name="index-instruction-mnemonics_002c-s390"></a>
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<a name="index-s390-instruction-mnemonics"></a>
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<p>All instructions documented in the Principles of Operation are supported
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with the mnemonic and order of operands as described.
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The instruction mnemonic identifies the instruction format
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(<a href="s390-Formats.html#s390-Formats">s390 Formats</a>) and the specific operation code for the instruction.
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For example, the ‘<samp>lr</samp>’ mnemonic denotes the instruction format ‘<samp>RR</samp>’
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with the operation code ‘<samp>0x18</samp>’.
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</p>
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<p>The definition of the various mnemonics follows a scheme, where the first
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character usually hint at the type of the instruction:
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</p>
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<div class="display">
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<table>
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<tr><td><pre class="display">a</pre></td><td><pre class="display">add instruction, for example ‘<samp>al</samp>’ for add logical 32-bit</pre></td></tr>
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<tr><td><pre class="display">b</pre></td><td><pre class="display">branch instruction, for example ‘<samp>bc</samp>’ for branch on condition</pre></td></tr>
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<tr><td><pre class="display">c</pre></td><td><pre class="display">compare or convert instruction, for example ‘<samp>cr</samp>’ for compare
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register 32-bit</pre></td></tr>
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<tr><td><pre class="display">d</pre></td><td><pre class="display">divide instruction, for example ‘<samp>dlr</samp>’ devide logical register
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64-bit to 32-bit</pre></td></tr>
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<tr><td><pre class="display">i</pre></td><td><pre class="display">insert instruction, for example ‘<samp>ic</samp>’ insert character</pre></td></tr>
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<tr><td><pre class="display">l</pre></td><td><pre class="display">load instruction, for example ‘<samp>ltr</samp>’ load and test register</pre></td></tr>
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<tr><td><pre class="display">mv</pre></td><td><pre class="display">move instruction, for example ‘<samp>mvc</samp>’ move character</pre></td></tr>
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<tr><td><pre class="display">m</pre></td><td><pre class="display">multiply instruction, for example ‘<samp>mh</samp>’ multiply halfword</pre></td></tr>
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<tr><td><pre class="display">n</pre></td><td><pre class="display">and instruction, for example ‘<samp>ni</samp>’ and immediate</pre></td></tr>
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<tr><td><pre class="display">o</pre></td><td><pre class="display">or instruction, for example ‘<samp>oc</samp>’ or character</pre></td></tr>
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<tr><td><pre class="display">sla, sll</pre></td><td><pre class="display">shift left single instruction</pre></td></tr>
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<tr><td><pre class="display">sra, srl</pre></td><td><pre class="display">shift right single instruction</pre></td></tr>
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<tr><td><pre class="display">st</pre></td><td><pre class="display">store instruction, for example ‘<samp>stm</samp>’ store multiple</pre></td></tr>
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<tr><td><pre class="display">s</pre></td><td><pre class="display">subtract instruction, for example ‘<samp>slr</samp>’ subtract
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logical 32-bit</pre></td></tr>
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<tr><td><pre class="display">t</pre></td><td><pre class="display">test or translate instruction, of example ‘<samp>tm</samp>’ test under mask</pre></td></tr>
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<tr><td><pre class="display">x</pre></td><td><pre class="display">exclusive or instruction, for example ‘<samp>xc</samp>’ exclusive or
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character</pre></td></tr>
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</table>
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</div>
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<p>Certain characters at the end of the mnemonic may describe a property
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of the instruction:
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</p>
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<div class="display">
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<table>
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<tr><td><pre class="display">c</pre></td><td><pre class="display">the instruction uses a 8-bit character operand</pre></td></tr>
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<tr><td><pre class="display">f</pre></td><td><pre class="display">the instruction extends a 32-bit operand to 64 bit</pre></td></tr>
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<tr><td><pre class="display">g</pre></td><td><pre class="display">the operands are treated as 64-bit values</pre></td></tr>
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<tr><td><pre class="display">h</pre></td><td><pre class="display">the operand uses a 16-bit halfword operand</pre></td></tr>
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<tr><td><pre class="display">i</pre></td><td><pre class="display">the instruction uses an immediate operand</pre></td></tr>
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<tr><td><pre class="display">l</pre></td><td><pre class="display">the instruction uses unsigned, logical operands</pre></td></tr>
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<tr><td><pre class="display">m</pre></td><td><pre class="display">the instruction uses a mask or operates on multiple values</pre></td></tr>
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<tr><td><pre class="display">r</pre></td><td><pre class="display">if r is the last character, the instruction operates on registers</pre></td></tr>
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<tr><td><pre class="display">y</pre></td><td><pre class="display">the instruction uses 20-bit displacements</pre></td></tr>
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</table>
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</div>
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<p>There are many exceptions to the scheme outlined in the above lists, in
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particular for the privileged instructions. For non-privileged
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instruction it works quite well, for example the instruction ‘<samp>clgfr</samp>’
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c: compare instruction, l: unsigned operands, g: 64-bit operands,
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f: 32- to 64-bit extension, r: register operands. The instruction compares
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an 64-bit value in a register with the zero extended 32-bit value from
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a second register.
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For a complete list of all mnemonics see appendix B in the Principles
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of Operation.
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</p>
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<hr>
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<div class="header">
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<p>
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Next: <a href="s390-Operands.html#s390-Operands" accesskey="n" rel="next">s390 Operands</a>, Previous: <a href="s390-Register.html#s390-Register" accesskey="p" rel="previous">s390 Register</a>, Up: <a href="s390-Syntax.html#s390-Syntax" accesskey="u" rel="up">s390 Syntax</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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