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<title>Using as: RISC-V-Options</title>
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<a name="RISC_002dV_002dOptions"></a>
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<div class="header">
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<p>
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Next: <a href="RISC_002dV_002dDirectives.html#RISC_002dV_002dDirectives" accesskey="n" rel="next">RISC-V-Directives</a>, Up: <a href="RISC_002dV_002dDependent.html#RISC_002dV_002dDependent" accesskey="u" rel="up">RISC-V-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="RISC_002dV-Options"></a>
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<h4 class="subsection">9.38.1 RISC-V Options</h4>
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<p>The following table lists all available RISC-V specific options.
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</p>
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<dl compact="compact">
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<dd>
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<a name="index-_002dfpic-option_002c-RISC_002dV"></a>
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</dd>
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<dt><code>-fpic</code></dt>
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<dt><code>-fPIC</code></dt>
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<dd><p>Generate position-independent code
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</p>
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<a name="index-_002dfno_002dpic-option_002c-RISC_002dV"></a>
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</dd>
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<dt><code>-fno-pic</code></dt>
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<dd><p>Don’t generate position-independent code (default)
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</p>
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<a name="index-_002dmarch_003dISA-option_002c-RISC_002dV"></a>
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</dd>
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<dt><code>-march=ISA</code></dt>
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<dd><p>Select the base isa, as specified by ISA. For example -march=rv32ima.
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If this option and the architecture attributes aren’t set, then assembler
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will check the default configure setting –with-arch=ISA.
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</p>
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<a name="index-_002dmisa_002dspec_003dISAspec-option_002c-RISC_002dV"></a>
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</dd>
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<dt><code>-misa-spec=ISAspec</code></dt>
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<dd><p>Select the default isa spec version. If the version of ISA isn’t set
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by -march, then assembler helps to set the version according to
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the default chosen spec. If this option isn’t set, then assembler will
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check the default configure setting –with-isa-spec=ISAspec.
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</p>
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<a name="index-_002dmpriv_002dspec_003dPRIVspec-option_002c-RISC_002dV"></a>
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</dd>
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<dt><code>-mpriv-spec=PRIVspec</code></dt>
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<dd><p>Select the privileged spec version. We can decide whether the CSR is valid or
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not according to the chosen spec. If this option and the privilege attributes
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aren’t set, then assembler will check the default configure setting
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–with-priv-spec=PRIVspec.
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</p>
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<a name="index-_002dmabi_003dABI-option_002c-RISC_002dV"></a>
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</dd>
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<dt><code>-mabi=ABI</code></dt>
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<dd><p>Selects the ABI, which is either "ilp32" or "lp64", optionally followed
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by "f", "d", or "q" to indicate single-precision, double-precision, or
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quad-precision floating-point calling convention, or none to indicate
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the soft-float calling convention. Also, "ilp32" can optionally be followed
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by "e" to indicate the RVE ABI, which is always soft-float.
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</p>
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<a name="index-_002dmrelax-option_002c-RISC_002dV"></a>
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</dd>
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<dt><code>-mrelax</code></dt>
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<dd><p>Take advantage of linker relaxations to reduce the number of instructions
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required to materialize symbol addresses. (default)
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</p>
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<a name="index-_002dmno_002drelax-option_002c-RISC_002dV"></a>
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</dd>
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<dt><code>-mno-relax</code></dt>
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<dd><p>Don’t do linker relaxations.
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</p>
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<a name="index-_002dmarch_002dattr-option_002c-RISC_002dV"></a>
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</dd>
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<dt><code>-march-attr</code></dt>
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<dd><p>Generate the default contents for the riscv elf attribute section if the
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.attribute directives are not set. This section is used to record the
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information that a linker or runtime loader needs to check compatibility.
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This information includes ISA string, stack alignment requirement, unaligned
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memory accesses, and the major, minor and revision version of privileged
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specification.
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</p>
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<a name="index-_002dmno_002darch_002dattr-option_002c-RISC_002dV"></a>
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</dd>
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<dt><code>-mno-arch-attr</code></dt>
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<dd><p>Don’t generate the default riscv elf attribute section if the .attribute
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directives are not set.
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</p>
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<a name="index-_002dmcsr_002dcheck-option_002c-RISC_002dV"></a>
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</dd>
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<dt><code>-mcsr-check</code></dt>
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<dd><p>Enable the CSR checking for the ISA-dependent CRS and the read-only CSR.
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The ISA-dependent CSR are only valid when the specific ISA is set. The
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read-only CSR can not be written by the CSR instructions.
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</p>
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<a name="index-_002dmno_002dcsr_002dcheck-option_002c-RISC_002dV"></a>
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</dd>
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<dt><code>-mno-csr-check</code></dt>
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<dd><p>Don’t do CSR checking.
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</p>
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<a name="index-_002dmlittle_002dendian-option_002c-RISC_002dV"></a>
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</dd>
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<dt><code>-mlittle-endian</code></dt>
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<dd><p>Generate code for a little endian machine.
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</p>
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<a name="index-_002dmbig_002dendian-option_002c-RISC_002dV"></a>
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</dd>
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<dt><code>-mbig-endian</code></dt>
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<dd><p>Generate code for a big endian machine.
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</p></dd>
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</dl>
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<hr>
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<div class="header">
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<p>
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Next: <a href="RISC_002dV_002dDirectives.html#RISC_002dV_002dDirectives" accesskey="n" rel="next">RISC-V-Directives</a>, Up: <a href="RISC_002dV_002dDependent.html#RISC_002dV_002dDependent" accesskey="u" rel="up">RISC-V-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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