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<title>Using as: RISC-V-Modifiers</title>
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<a name="RISC_002dV_002dModifiers"></a>
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<div class="header">
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<p>
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Next: <a href="RISC_002dV_002dFormats.html#RISC_002dV_002dFormats" accesskey="n" rel="next">RISC-V-Formats</a>, Previous: <a href="RISC_002dV_002dDirectives.html#RISC_002dV_002dDirectives" accesskey="p" rel="previous">RISC-V-Directives</a>, Up: <a href="RISC_002dV_002dDependent.html#RISC_002dV_002dDependent" accesskey="u" rel="up">RISC-V-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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<hr>
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<a name="RISC_002dV-Assembler-Modifiers"></a>
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<h4 class="subsection">9.38.3 RISC-V Assembler Modifiers</h4>
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<p>The RISC-V assembler supports following modifiers for relocatable addresses
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used in RISC-V instruction operands. However, we also support some pseudo
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instructions that are easier to use than these modifiers.
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</p>
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<dl compact="compact">
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<dt><code>%lo(<var>symbol</var>)</code></dt>
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<dd><p>The low 12 bits of absolute address for <var>symbol</var>.
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</p>
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</dd>
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<dt><code>%hi(<var>symbol</var>)</code></dt>
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<dd><p>The high 20 bits of absolute address for <var>symbol</var>. This is usually
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used with the %lo modifier to represent a 32-bit absolute address.
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</p>
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<div class="smallexample">
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<pre class="smallexample"> lui a0, %hi(<var>symbol</var>) // R_RISCV_HI20
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addi a0, a0, %lo(<var>symbol</var>) // R_RISCV_LO12_I
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lui a0, %hi(<var>symbol</var>) // R_RISCV_HI20
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load/store a0, %lo(<var>symbol</var>)(a0) // R_RISCV_LO12_I/S
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</pre></div>
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</dd>
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<dt><code>%pcrel_lo(<var>label</var>)</code></dt>
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<dd><p>The low 12 bits of relative address between pc and <var>symbol</var>.
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The <var>symbol</var> is related to the high part instruction which is marked
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by <var>label</var>.
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</p>
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</dd>
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<dt><code>%pcrel_hi(<var>symbol</var>)</code></dt>
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<dd><p>The high 20 bits of relative address between pc and <var>symbol</var>.
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This is usually used with the %pcrel_lo modifier to represent a +/-2GB
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pc-relative range.
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</p>
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<div class="smallexample">
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<pre class="smallexample"><var>label</var>:
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auipc a0, %pcrel_hi(<var>symbol</var>) // R_RISCV_PCREL_HI20
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addi a0, a0, %pcrel_lo(<var>label</var>) // R_RISCV_PCREL_LO12_I
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<var>label</var>:
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auipc a0, %pcrel_hi(<var>symbol</var>) // R_RISCV_PCREL_HI20
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load/store a0, %pcrel_lo(<var>label</var>)(a0) // R_RISCV_PCREL_LO12_I/S
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</pre></div>
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<p>Or you can use the pseudo lla/lw/sw/... instruction to do this.
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</p>
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<div class="smallexample">
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<pre class="smallexample"> lla a0, <var>symbol</var>
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</pre></div>
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</dd>
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<dt><code>%got_pcrel_hi(<var>symbol</var>)</code></dt>
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<dd><p>The high 20 bits of relative address between pc and the GOT entry of
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<var>symbol</var>. This is usually used with the %pcrel_lo modifier to access
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the GOT entry.
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</p>
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<div class="smallexample">
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<pre class="smallexample"><var>label</var>:
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auipc a0, %got_pcrel_hi(<var>symbol</var>) // R_RISCV_GOT_HI20
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addi a0, a0, %pcrel_lo(<var>label</var>) // R_RISCV_PCREL_LO12_I
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<var>label</var>:
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auipc a0, %got_pcrel_hi(<var>symbol</var>) // R_RISCV_GOT_HI20
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load/store a0, %pcrel_lo(<var>label</var>)(a0) // R_RISCV_PCREL_LO12_I/S
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</pre></div>
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<p>Also, the pseudo la instruction with PIC has similar behavior.
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</p>
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</dd>
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<dt><code>%tprel_add(<var>symbol</var>)</code></dt>
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<dd><p>This is used purely to associate the R_RISCV_TPREL_ADD relocation for
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TLS relaxation. This one is only valid as the fourth operand to the normally
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3 operand add instruction.
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</p>
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</dd>
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<dt><code>%tprel_lo(<var>symbol</var>)</code></dt>
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<dd><p>The low 12 bits of relative address between tp and <var>symbol</var>.
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</p>
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</dd>
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<dt><code>%tprel_hi(<var>symbol</var>)</code></dt>
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<dd><p>The high 20 bits of relative address between tp and <var>symbol</var>. This is
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usually used with the %tprel_lo and %tprel_add modifiers to access the thread
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local variable <var>symbol</var> in TLS Local Exec.
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</p>
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<div class="smallexample">
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<pre class="smallexample"> lui a5, %tprel_hi(<var>symbol</var>) // R_RISCV_TPREL_HI20
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add a5, a5, tp, %tprel_add(<var>symbol</var>) // R_RISCV_TPREL_ADD
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load/store t0, %tprel_lo(<var>symbol</var>)(a5) // R_RISCV_TPREL_LO12_I/S
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</pre></div>
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</dd>
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<dt><code>%tls_ie_pcrel_hi(<var>symbol</var>)</code></dt>
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<dd><p>The high 20 bits of relative address between pc and GOT entry. It is
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usually used with the %pcrel_lo modifier to access the thread local
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variable <var>symbol</var> in TLS Initial Exec.
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</p>
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<div class="smallexample">
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<pre class="smallexample"> la.tls.ie a5, <var>symbol</var>
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add a5, a5, tp
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load/store t0, 0(a5)
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</pre></div>
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<p>The pseudo la.tls.ie instruction can be expended to
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</p>
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<div class="smallexample">
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<pre class="smallexample"><var>label</var>:
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auipc a5, %tls_ie_pcrel_hi(<var>symbol</var>) // R_RISCV_TLS_GOT_HI20
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load a5, %pcrel_lo(<var>label</var>)(a5) // R_RISCV_PCREL_LO12_I
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</pre></div>
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</dd>
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<dt><code>%tls_gd_pcrel_hi(<var>symbol</var>)</code></dt>
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<dd><p>The high 20 bits of relative address between pc and GOT entry. It is
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usually used with the %pcrel_lo modifier to access the thread local variable
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<var>symbol</var> in TLS Global Dynamic.
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</p>
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<div class="smallexample">
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<pre class="smallexample"> la.tls.gd a0, <var>symbol</var>
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call __tls_get_addr@plt
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mv a5, a0
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load/store t0, 0(a5)
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</pre></div>
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<p>The pseudo la.tls.gd instruction can be expended to
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</p>
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<div class="smallexample">
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<pre class="smallexample"><var>label</var>:
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auipc a0, %tls_gd_pcrel_hi(<var>symbol</var>) // R_RISCV_TLS_GD_HI20
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addi a0, a0, %pcrel_lo(<var>label</var>) // R_RISCV_PCREL_LO12_I
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</pre></div>
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</dd>
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</dl>
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<hr>
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<div class="header">
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<p>
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Next: <a href="RISC_002dV_002dFormats.html#RISC_002dV_002dFormats" accesskey="n" rel="next">RISC-V-Formats</a>, Previous: <a href="RISC_002dV_002dDirectives.html#RISC_002dV_002dDirectives" accesskey="p" rel="previous">RISC-V-Directives</a>, Up: <a href="RISC_002dV_002dDependent.html#RISC_002dV_002dDependent" accesskey="u" rel="up">RISC-V-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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