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<title>Using as: NDS32 Options</title>
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<a name="NDS32-Options"></a>
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<p>
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Next: <a href="NDS32-Syntax.html#NDS32-Syntax" accesskey="n" rel="next">NDS32 Syntax</a>, Up: <a href="NDS32_002dDependent.html#NDS32_002dDependent" accesskey="u" rel="up">NDS32-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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<hr>
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<a name="NDS32-Options-1"></a>
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<h4 class="subsection">9.30.1 NDS32 Options</h4>
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<a name="index-NDS32-options"></a>
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<a name="index-options-for-NDS32"></a>
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<p>The NDS32 configurations of <small>GNU</small> <code>as</code> support these
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special options:
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</p>
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<dl compact="compact">
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<dt><code>-O1</code></dt>
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<dd><p>Optimize for performance.
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</p>
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</dd>
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<dt><code>-Os</code></dt>
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<dd><p>Optimize for space.
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</p>
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</dd>
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<dt><code>-EL</code></dt>
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<dd><p>Produce little endian data output.
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</p>
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</dd>
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<dt><code>-EB</code></dt>
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<dd><p>Produce little endian data output.
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</p>
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</dd>
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<dt><code>-mpic</code></dt>
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<dd><p>Generate PIC.
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</p>
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</dd>
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<dt><code>-mno-fp-as-gp-relax</code></dt>
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<dd><p>Suppress fp-as-gp relaxation for this file.
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</p>
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</dd>
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<dt><code>-mb2bb-relax</code></dt>
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<dd><p>Back-to-back branch optimization.
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</p>
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</dd>
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<dt><code>-mno-all-relax</code></dt>
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<dd><p>Suppress all relaxation for this file.
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</p>
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</dd>
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<dt><code>-march=<arch name></code></dt>
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<dd><p>Assemble for architecture <arch name> which could be v3, v3j, v3m, v3f,
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v3s, v2, v2j, v2f, v2s.
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</p>
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</dd>
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<dt><code>-mbaseline=<baseline></code></dt>
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<dd><p>Assemble for baseline <baseline> which could be v2, v3, v3m.
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</p>
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</dd>
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<dt><code>-mfpu-freg=<var>FREG</var></code></dt>
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<dd><p>Specify a FPU configuration.
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</p><dl compact="compact">
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<dt><code>0 8 SP / 4 DP registers</code></dt>
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<dt><code>1 16 SP / 8 DP registers</code></dt>
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<dt><code>2 32 SP / 16 DP registers</code></dt>
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<dt><code>3 32 SP / 32 DP registers</code></dt>
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</dl>
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</dd>
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<dt><code>-mabi=<var>abi</var></code></dt>
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<dd><p>Specify a abi version <abi> could be v1, v2, v2fp, v2fpp.
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</p>
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</dd>
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<dt><code>-m[no-]mac</code></dt>
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<dd><p>Enable/Disable Multiply instructions support.
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</p>
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</dd>
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<dt><code>-m[no-]div</code></dt>
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<dd><p>Enable/Disable Divide instructions support.
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</p>
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</dd>
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<dt><code>-m[no-]16bit-ext</code></dt>
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<dd><p>Enable/Disable 16-bit extension
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</p>
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</dd>
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<dt><code>-m[no-]dx-regs</code></dt>
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<dd><p>Enable/Disable d0/d1 registers
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</p>
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</dd>
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<dt><code>-m[no-]perf-ext</code></dt>
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<dd><p>Enable/Disable Performance extension
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</p>
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</dd>
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<dt><code>-m[no-]perf2-ext</code></dt>
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<dd><p>Enable/Disable Performance extension 2
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</p>
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</dd>
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<dt><code>-m[no-]string-ext</code></dt>
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<dd><p>Enable/Disable String extension
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</p>
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</dd>
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<dt><code>-m[no-]reduced-regs</code></dt>
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<dd><p>Enable/Disable Reduced Register configuration (GPR16) option
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</p>
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</dd>
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<dt><code>-m[no-]audio-isa-ext</code></dt>
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<dd><p>Enable/Disable AUDIO ISA extension
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</p>
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</dd>
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<dt><code>-m[no-]fpu-sp-ext</code></dt>
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<dd><p>Enable/Disable FPU SP extension
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</p>
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</dd>
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<dt><code>-m[no-]fpu-dp-ext</code></dt>
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<dd><p>Enable/Disable FPU DP extension
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</p>
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</dd>
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<dt><code>-m[no-]fpu-fma</code></dt>
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<dd><p>Enable/Disable FPU fused-multiply-add instructions
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</p>
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</dd>
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<dt><code>-mall-ext</code></dt>
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<dd><p>Turn on all extensions and instructions support
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</p></dd>
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</dl>
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