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<title>Using as: M68K-Moto-Syntax</title>
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<a name="M68K_002dMoto_002dSyntax"></a>
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<div class="header">
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<p>
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Next: <a href="M68K_002dFloat.html#M68K_002dFloat" accesskey="n" rel="next">M68K-Float</a>, Previous: <a href="M68K_002dSyntax.html#M68K_002dSyntax" accesskey="p" rel="previous">M68K-Syntax</a>, Up: <a href="M68K_002dDependent.html#M68K_002dDependent" accesskey="u" rel="up">M68K-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="Motorola-Syntax"></a>
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<h4 class="subsection">9.22.3 Motorola Syntax</h4>
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<a name="index-Motorola-syntax-for-the-680x0"></a>
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<a name="index-alternate-syntax-for-the-680x0"></a>
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<p>The standard Motorola syntax for this chip differs from the syntax
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already discussed (see <a href="M68K_002dSyntax.html#M68K_002dSyntax">Syntax</a>). <code>as</code> can
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accept Motorola syntax for operands, even if <small>MIT</small> syntax is used for
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other operands in the same instruction. The two kinds of syntax are
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fully compatible.
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</p>
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<p>In the following table <var>apc</var> stands for any of the address registers
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(‘<samp>%a0</samp>’ through ‘<samp>%a7</samp>’), the program counter (‘<samp>%pc</samp>’), the
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zero-address relative to the program counter (‘<samp>%zpc</samp>’), or a
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suppressed address register (‘<samp>%za0</samp>’ through ‘<samp>%za7</samp>’). The use
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of <var>size</var> means one of ‘<samp>w</samp>’ or ‘<samp>l</samp>’, and it may always be
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omitted along with the leading dot. The use of <var>scale</var> means one of
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‘<samp>1</samp>’, ‘<samp>2</samp>’, ‘<samp>4</samp>’, or ‘<samp>8</samp>’, and it may always be omitted
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along with the leading asterisk.
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</p>
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<p>The following additional addressing modes are understood:
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</p>
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<dl compact="compact">
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<dt><em>Address Register Indirect</em></dt>
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<dd><p>‘<samp>(%a0)</samp>’ through ‘<samp>(%a7)</samp>’<br>
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‘<samp>%a7</samp>’ is also known as ‘<samp>%sp</samp>’, i.e., the Stack Pointer. <code>%a6</code>
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is also known as ‘<samp>%fp</samp>’, the Frame Pointer.
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</p>
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</dd>
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<dt><em>Address Register Postincrement</em></dt>
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<dd><p>‘<samp>(%a0)+</samp>’ through ‘<samp>(%a7)+</samp>’
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</p>
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</dd>
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<dt><em>Address Register Predecrement</em></dt>
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<dd><p>‘<samp>-(%a0)</samp>’ through ‘<samp>-(%a7)</samp>’
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</p>
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</dd>
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<dt><em>Indirect Plus Offset</em></dt>
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<dd><p>‘<samp><var>number</var>(<var>%a0</var>)</samp>’ through ‘<samp><var>number</var>(<var>%a7</var>)</samp>’,
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or ‘<samp><var>number</var>(<var>%pc</var>)</samp>’.
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</p>
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<p>The <var>number</var> may also appear within the parentheses, as in
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‘<samp>(<var>number</var>,<var>%a0</var>)</samp>’. When used with the <var>pc</var>, the
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<var>number</var> may be omitted (with an address register, omitting the
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<var>number</var> produces Address Register Indirect mode).
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</p>
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</dd>
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<dt><em>Index</em></dt>
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<dd><p>‘<samp><var>number</var>(<var>apc</var>,<var>register</var>.<var>size</var>*<var>scale</var>)</samp>’
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</p>
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<p>The <var>number</var> may be omitted, or it may appear within the
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parentheses. The <var>apc</var> may be omitted. The <var>register</var> and the
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<var>apc</var> may appear in either order. If both <var>apc</var> and
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<var>register</var> are address registers, and the <var>size</var> and <var>scale</var>
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are omitted, then the first register is taken as the base register, and
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the second as the index register.
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</p>
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</dd>
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<dt><em>Postindex</em></dt>
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<dd><p>‘<samp>([<var>number</var>,<var>apc</var>],<var>register</var>.<var>size</var>*<var>scale</var>,<var>onumber</var>)</samp>’
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</p>
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<p>The <var>onumber</var>, or the <var>register</var>, or both, may be omitted.
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Either the <var>number</var> or the <var>apc</var> may be omitted, but not both.
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</p>
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</dd>
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<dt><em>Preindex</em></dt>
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<dd><p>‘<samp>([<var>number</var>,<var>apc</var>,<var>register</var>.<var>size</var>*<var>scale</var>],<var>onumber</var>)</samp>’
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</p>
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<p>The <var>number</var>, or the <var>apc</var>, or the <var>register</var>, or any two of
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them, may be omitted. The <var>onumber</var> may be omitted. The
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<var>register</var> and the <var>apc</var> may appear in either order. If both
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<var>apc</var> and <var>register</var> are address registers, and the <var>size</var>
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and <var>scale</var> are omitted, then the first register is taken as the
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base register, and the second as the index register.
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</p></dd>
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</dl>
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<hr>
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<div class="header">
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<p>
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Next: <a href="M68K_002dFloat.html#M68K_002dFloat" accesskey="n" rel="next">M68K-Float</a>, Previous: <a href="M68K_002dSyntax.html#M68K_002dSyntax" accesskey="p" rel="previous">M68K-Syntax</a>, Up: <a href="M68K_002dDependent.html#M68K_002dDependent" accesskey="u" rel="up">M68K-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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