/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _HALMAC_88XX_CFG_H_
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#define _HALMAC_88XX_CFG_H_
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#include "../halmac_2_platform.h"
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#include "../halmac_type.h"
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#include "../halmac_hw_cfg.h"
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#include "../halmac_api.h"
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#include "../halmac_bit2.h"
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#include "../halmac_reg2.h"
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#include "../halmac_pwr_seq_cmd.h"
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#include "halmac_func_88xx.h"
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#include "halmac_api_88xx.h"
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#include "halmac_api_88xx_usb.h"
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#include "halmac_api_88xx_pcie.h"
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#include "halmac_api_88xx_sdio.h"
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#if HALMAC_PLATFORM_TESTPROGRAM
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#include "halmisc_api_88xx.h"
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#include "halmisc_api_88xx_usb.h"
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#include "halmisc_api_88xx_pcie.h"
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#include "halmisc_api_88xx_sdio.h"
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#endif
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#define HALMAC_SVN_VER_88XX "11974M"
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/* major version, ver_1 for async_api */
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#define HALMAC_MAJOR_VER_88XX 0x0001
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/* For halmac_api num change or prototype change, increment prototype version */
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#define HALMAC_PROTOTYPE_VER_88XX 0x0002
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/* else increment minor version */
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#define HALMAC_MINOR_VER_88XX 0x0000
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#define HALMAC_C2H_DATA_OFFSET_88XX 10
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#define HALMAC_RX_AGG_ALIGNMENT_SIZE_88XX 8
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#define HALMAC_TX_AGG_ALIGNMENT_SIZE_88XX 8
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#define HALMAC_TX_AGG_BUFF_SIZE_88XX 32768
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#define HALMAC_EXTRA_INFO_BUFF_SIZE_88XX 4096 /*4K*/
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#define HALMAC_EXTRA_INFO_BUFF_SIZE_FULL_FIFO_88XX 16384 /*16K*/
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#define HALMAC_FW_OFFLOAD_CMD_SIZE_88XX 12 /*Fw config parameter cmd size, each 12 byte*/
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#define HALMAC_H2C_CMD_ORIGINAL_SIZE_88XX 8
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#define HALMAC_H2C_CMD_SIZE_UNIT_88XX 32 /* Only support 32 byte packet now */
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#define HALMAC_NLO_INFO_SIZE_88XX 1024
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/* Download FW */
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#define HALMAC_FW_SIZE_MAX_88XX 0x40000
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#define HALMAC_FWHDR_SIZE_88XX 64
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#define HALMAC_FW_CHKSUM_DUMMY_SIZE_88XX 8
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#define HALMAC_FW_MAX_DL_SIZE_88XX 0x2000 /* need power of 2 */
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/* Max dlfw size can not over 31K, because SDIO HW restriction */
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#define HALMAC_FW_CFG_MAX_DL_SIZE_MAX_88XX 0x7C00
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#define DLFW_RESTORE_REG_NUM_88XX 9
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/* FW header information */
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#define HALMAC_FWHDR_OFFSET_VERSION_88XX 4
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#define HALMAC_FWHDR_OFFSET_SUBVERSION_88XX 6
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#define HALMAC_FWHDR_OFFSET_SUBINDEX_88XX 7
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#define HALMAC_FWHDR_OFFSET_MEM_USAGE_88XX 24
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#define HALMAC_FWHDR_OFFSET_H2C_FORMAT_VER_88XX 28
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#define HALMAC_FWHDR_OFFSET_DMEM_ADDR_88XX 32
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#define HALMAC_FWHDR_OFFSET_DMEM_SIZE_88XX 36
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#define HALMAC_FWHDR_OFFSET_IRAM_SIZE_88XX 48
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#define HALMAC_FWHDR_OFFSET_ERAM_SIZE_88XX 52
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#define HALMAC_FWHDR_OFFSET_EMEM_ADDR_88XX 56
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#define HALMAC_FWHDR_OFFSET_IRAM_ADDR_88XX 60
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/* HW memory address */
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#define HALMAC_OCPBASE_TXBUF_88XX 0x18780000
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#define HALMAC_OCPBASE_DMEM_88XX 0x00200000
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#define HALMAC_OCPBASE_IMEM_88XX 0x00000000
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/* define the SDIO Bus CLK threshold, for avoiding CMD53 fails that result from SDIO CLK sync to ana_clk fail */
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#define HALMAC_SD_CLK_THRESHOLD_88XX 150000000 /* 150MHz */
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/* MAC clock */
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#define HALMAC_MAC_CLOCK_88XX 80 /* 80M */
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/* H2C/C2H*/
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#define HALMAC_H2C_CMD_SIZE_88XX 32
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#define HALMAC_H2C_CMD_HDR_SIZE_88XX 8
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#define HALMAC_RESERVED_EFUSE_SIZE_88XX 0x30
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#define HALMAC_PROTECTED_EFUSE_SIZE_88XX 0x60
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/* Function enable */
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#define HALMAC_FUNCTION_ENABLE_88XX 0xDC
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/* FIFO size & packet size */
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/* #define HALMAC_WOWLAN_PATTERN_SIZE 256 */
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/* CFEND rate */
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#define HALMAC_BASIC_CFEND_RATE_88XX 0x5
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#define HALMAC_STBC_CFEND_RATE_88XX 0xF
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/* Response rate */
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#define HALMAC_RESPONSE_RATE_BITMAP_ALL_88XX 0xFFFFF
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#define HALMAC_RESPONSE_RATE_88XX HALMAC_RESPONSE_RATE_BITMAP_ALL_88XX
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/* Spec SIFS */
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#define HALMAC_SIFS_CCK_PTCL_88XX 16
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#define HALMAC_SIFS_OFDM_PTCL_88XX 16
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/* Retry limit */
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#define HALMAC_LONG_RETRY_LIMIT_88XX 8
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#define HALMAC_SHORT_RETRY_LIMIT_88XX 7
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/* Slot, SIFS, PIFS time */
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#define HALMAC_SLOT_TIME_88XX 0x05
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#define HALMAC_PIFS_TIME_88XX 0x19
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#define HALMAC_SIFS_CCK_CTX_88XX 0xA
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#define HALMAC_SIFS_OFDM_CTX_88XX 0xA
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#define HALMAC_SIFS_CCK_TRX_88XX 0x10
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#define HALMAC_SIFS_OFDM_TRX_88XX 0x10
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/* TXOP limit */
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#define HALMAC_VO_TXOP_LIMIT_88XX 0x186
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#define HALMAC_VI_TXOP_LIMIT_88XX 0x3BC
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/* NAV */
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#define HALMAC_RDG_NAV_88XX 0x05
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#define HALMAC_TXOP_NAV_88XX 0x1B
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/* TSF */
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#define HALMAC_CCK_RX_TSF_88XX 0x30
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#define HALMAC_OFDM_RX_TSF_88XX 0x30
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/* Send beacon related */
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#define HALMAC_TBTT_PROHIBIT_88XX 0x04
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#define HALMAC_TBTT_HOLD_TIME_88XX 0x064
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#define HALMAC_DRIVER_EARLY_INT_88XX 0x04
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#define HALMAC_BEACON_DMA_TIM_88XX 0x02
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/* RX filter */
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#define HALMAC_RX_FILTER0_RECIVE_ALL_88XX 0xFFFFFFF
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#define HALMAC_RX_FILTER0_88XX HALMAC_RX_FILTER0_RECIVE_ALL_88XX
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#define HALMAC_RX_FILTER_RECIVE_ALL_88XX 0xFFFF
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#define HALMAC_RX_FILTER_88XX HALMAC_RX_FILTER_RECIVE_ALL_88XX
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/* RCR */
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#define HALMAC_RCR_CONFIG_88XX 0xE400631E
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/* Security config */
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#define HALMAC_SECURITY_CONFIG_88XX 0x01CC
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#endif
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