/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#include "mp_precomp.h"
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#include "phydm_precomp.h"
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/*Set NHM period, threshold, disable ignore cca or not, disable ignore txon or not*/
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void
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phydm_nhm_init(
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void *p_dm_void
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)
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{
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struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
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struct _CCX_INFO *ccx_info = &p_dm->dm_ccx_info;
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PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
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PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("cur_ig_value=0x%x\n", p_dm->dm_dig_table.cur_ig_value));
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phydm_set_nhm_th_by_igi(p_dm, p_dm->dm_dig_table.cur_ig_value);
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ccx_info->nhm_period = 0xC350;
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ccx_info->nhm_inexclude_cca = NHM_EXCLUDE_CCA;
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ccx_info->nhm_inexclude_txon = NHM_EXCLUDE_TXON;
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phydm_nhm_setting(p_dm, SET_NHM_SETTING);
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}
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boolean
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phydm_cal_nhm_cnt(
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void *p_dm_void
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)
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{
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struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
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struct _CCX_INFO *ccx_info = &p_dm->dm_ccx_info;
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u8 noisy_nhm_th_index, low_pwr_cnt = 0, high_pwr_cnt = 0;
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u8 noisy_nhm_th = 0x52;
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u8 i;
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boolean noisy = false, clean = true;
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PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
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if (!(p_dm->support_ability & ODM_BB_ENV_MONITOR))
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return noisy;
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/*nhm_th = 0x52 means 0x52/2-110 = -69dbm*/
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/* IGI < 0x14 */
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if (ccx_info->nhm_th[10] < noisy_nhm_th)
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return clean;
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else if (ccx_info->nhm_th[0] > noisy_nhm_th)
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return (p_dm->noisy_decision) ? noisy : clean;
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/* 0x14 <= IGI <= 0x37*/
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else {
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/* search index */
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noisy_nhm_th_index = (noisy_nhm_th - ccx_info->nhm_th[0]) << 2;
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for (i = 0; i <= 11; i++) {
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if (i <= noisy_nhm_th_index)
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low_pwr_cnt += ccx_info->nhm_result[i];
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else
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high_pwr_cnt += ccx_info->nhm_result[i];
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}
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if (low_pwr_cnt + high_pwr_cnt == 0)
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return noisy; /* noisy environment */
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else if (low_pwr_cnt - high_pwr_cnt >= 100)
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return clean; /* clean environment */
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else
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return noisy; /* noisy environment */
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}
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}
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void
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phydm_nhm_setting(
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void *p_dm_void,
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u8 nhm_setting
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)
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{
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struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
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struct _CCX_INFO *ccx_info = &p_dm->dm_ccx_info;
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PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
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if (nhm_setting == SET_NHM_SETTING) {
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PHYDM_DBG(p_dm, DBG_ENV_MNTR,
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("nhm_th=(H->L)[0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x]\n",
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ccx_info->nhm_th[10], ccx_info->nhm_th[9], ccx_info->nhm_th[8],
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ccx_info->nhm_th[7], ccx_info->nhm_th[6], ccx_info->nhm_th[5],
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ccx_info->nhm_th[4], ccx_info->nhm_th[3], ccx_info->nhm_th[2],
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ccx_info->nhm_th[1], ccx_info->nhm_th[0]));
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}
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if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
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if (nhm_setting == SET_NHM_SETTING) {
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/*Set inexclude_cca, inexclude_txon*/
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(9), ccx_info->nhm_inexclude_cca);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(10), ccx_info->nhm_inexclude_txon);
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/*Set NHM period*/
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odm_set_bb_reg(p_dm, ODM_REG_CCX_PERIOD_11AC, MASKHWORD, ccx_info->nhm_period);
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/*Set NHM threshold*/ /*Unit: PWdB U(8,1)*/
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE0, ccx_info->nhm_th[0]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE1, ccx_info->nhm_th[1]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE2, ccx_info->nhm_th[2]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE3, ccx_info->nhm_th[3]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE0, ccx_info->nhm_th[4]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE1, ccx_info->nhm_th[5]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE2, ccx_info->nhm_th[6]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE3, ccx_info->nhm_th[7]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH8_11AC, MASKBYTE0, ccx_info->nhm_th[8]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE2, ccx_info->nhm_th[9]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE3, ccx_info->nhm_th[10]);
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/*CCX EN*/
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(8), CCX_EN);
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} else if (nhm_setting == STORE_NHM_SETTING) {
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/*Store pervious disable_ignore_cca, disable_ignore_txon*/
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ccx_info->nhm_inexclude_cca_restore = (enum nhm_inexclude_cca)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(9));
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ccx_info->nhm_inexclude_txon_restore = (enum nhm_inexclude_txon)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(10));
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/*Store pervious NHM period*/
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ccx_info->nhm_period_restore = (u16)odm_get_bb_reg(p_dm, ODM_REG_CCX_PERIOD_11AC, MASKHWORD);
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/*Store NHM threshold*/
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ccx_info->nhm_th_restore[0] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE0);
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ccx_info->nhm_th_restore[1] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE1);
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ccx_info->nhm_th_restore[2] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE2);
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ccx_info->nhm_th_restore[3] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE3);
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ccx_info->nhm_th_restore[4] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE0);
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ccx_info->nhm_th_restore[5] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE1);
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ccx_info->nhm_th_restore[6] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE2);
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ccx_info->nhm_th_restore[7] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE3);
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ccx_info->nhm_th_restore[8] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH8_11AC, MASKBYTE0);
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ccx_info->nhm_th_restore[9] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE2);
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ccx_info->nhm_th_restore[10] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE3);
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} else if (nhm_setting == RESTORE_NHM_SETTING) {
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/*Set disable_ignore_cca, disable_ignore_txon*/
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(9), ccx_info->nhm_inexclude_cca_restore);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(10), ccx_info->nhm_inexclude_txon_restore);
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/*Set NHM period*/
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odm_set_bb_reg(p_dm, ODM_REG_CCX_PERIOD_11AC, MASKHWORD, ccx_info->nhm_period);
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/*Set NHM threshold*/
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE0, ccx_info->nhm_th_restore[0]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE1, ccx_info->nhm_th_restore[1]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE2, ccx_info->nhm_th_restore[2]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE3, ccx_info->nhm_th_restore[3]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE0, ccx_info->nhm_th_restore[4]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE1, ccx_info->nhm_th_restore[5]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE2, ccx_info->nhm_th_restore[6]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE3, ccx_info->nhm_th_restore[7]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH8_11AC, MASKBYTE0, ccx_info->nhm_th_restore[8]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE2, ccx_info->nhm_th_restore[9]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE3, ccx_info->nhm_th_restore[10]);
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} else
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return;
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}
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else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
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if (nhm_setting == SET_NHM_SETTING) {
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/*Set disable_ignore_cca, disable_ignore_txon*/
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(9), ccx_info->nhm_inexclude_cca);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(10), ccx_info->nhm_inexclude_txon);
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/*Set NHM period*/
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odm_set_bb_reg(p_dm, ODM_REG_CCX_PERIOD_11N, MASKHWORD, ccx_info->nhm_period);
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/*Set NHM threshold*/
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE0, ccx_info->nhm_th[0]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE1, ccx_info->nhm_th[1]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE2, ccx_info->nhm_th[2]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE3, ccx_info->nhm_th[3]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE0, ccx_info->nhm_th[4]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE1, ccx_info->nhm_th[5]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE2, ccx_info->nhm_th[6]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE3, ccx_info->nhm_th[7]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH8_11N, MASKBYTE0, ccx_info->nhm_th[8]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE2, ccx_info->nhm_th[9]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE3, ccx_info->nhm_th[10]);
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/*CCX EN*/
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(8), CCX_EN);
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} else if (nhm_setting == STORE_NHM_SETTING) {
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/*Store pervious disable_ignore_cca, disable_ignore_txon*/
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ccx_info->nhm_inexclude_cca_restore = (enum nhm_inexclude_cca)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(9));
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ccx_info->nhm_inexclude_txon_restore = (enum nhm_inexclude_txon)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(10));
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/*Store pervious NHM period*/
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ccx_info->nhm_period_restore = (u16)odm_get_bb_reg(p_dm, ODM_REG_CCX_PERIOD_11N, MASKHWORD);
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/*Store NHM threshold*/
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ccx_info->nhm_th_restore[0] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE0);
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ccx_info->nhm_th_restore[1] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE1);
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ccx_info->nhm_th_restore[2] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE2);
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ccx_info->nhm_th_restore[3] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE3);
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ccx_info->nhm_th_restore[4] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE0);
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ccx_info->nhm_th_restore[5] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE1);
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ccx_info->nhm_th_restore[6] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE2);
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ccx_info->nhm_th_restore[7] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE3);
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ccx_info->nhm_th_restore[8] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH8_11N, MASKBYTE0);
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ccx_info->nhm_th_restore[9] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE2);
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ccx_info->nhm_th_restore[10] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE3);
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} else if (nhm_setting == RESTORE_NHM_SETTING) {
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/*Set disable_ignore_cca, disable_ignore_txon*/
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(9), ccx_info->nhm_inexclude_cca_restore);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(10), ccx_info->nhm_inexclude_txon_restore);
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/*Set NHM period*/
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odm_set_bb_reg(p_dm, ODM_REG_CCX_PERIOD_11N, MASKHWORD, ccx_info->nhm_period_restore);
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/*Set NHM threshold*/
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE0, ccx_info->nhm_th_restore[0]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE1, ccx_info->nhm_th_restore[1]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE2, ccx_info->nhm_th_restore[2]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE3, ccx_info->nhm_th_restore[3]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE0, ccx_info->nhm_th_restore[4]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE1, ccx_info->nhm_th_restore[5]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE2, ccx_info->nhm_th_restore[6]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE3, ccx_info->nhm_th_restore[7]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH8_11N, MASKBYTE0, ccx_info->nhm_th_restore[8]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE2, ccx_info->nhm_th_restore[9]);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE3, ccx_info->nhm_th_restore[10]);
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} else
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return;
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}
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}
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void
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phydm_nhm_trigger(
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void *p_dm_void
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)
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{
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struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
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PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
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if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
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/*Trigger NHM*/
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(1), 0);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(1), 1);
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} else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
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/*Trigger NHM*/
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(1), 0);
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odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(1), 1);
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}
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}
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void
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phydm_get_nhm_result(
|
void *p_dm_void
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)
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{
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struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
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struct _CCX_INFO *ccx_info = &p_dm->dm_ccx_info;
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u32 value32;
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u8 i;
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PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
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if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
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value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT_11AC);
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ccx_info->nhm_result[0] = (u8)(value32 & MASKBYTE0);
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ccx_info->nhm_result[1] = (u8)((value32 & MASKBYTE1) >> 8);
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ccx_info->nhm_result[2] = (u8)((value32 & MASKBYTE2) >> 16);
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ccx_info->nhm_result[3] = (u8)((value32 & MASKBYTE3) >> 24);
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value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT7_TO_CNT4_11AC);
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ccx_info->nhm_result[4] = (u8)(value32 & MASKBYTE0);
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ccx_info->nhm_result[5] = (u8)((value32 & MASKBYTE1) >> 8);
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ccx_info->nhm_result[6] = (u8)((value32 & MASKBYTE2) >> 16);
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ccx_info->nhm_result[7] = (u8)((value32 & MASKBYTE3) >> 24);
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value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT11_TO_CNT8_11AC);
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ccx_info->nhm_result[8] = (u8)(value32 & MASKBYTE0);
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ccx_info->nhm_result[9] = (u8)((value32 & MASKBYTE1) >> 8);
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ccx_info->nhm_result[10] = (u8)((value32 & MASKBYTE2) >> 16);
|
ccx_info->nhm_result[11] = (u8)((value32 & MASKBYTE3) >> 24);
|
|
/*Get NHM duration*/
|
value32 = odm_read_4byte(p_dm, ODM_REG_NHM_DUR_READY_11AC);
|
ccx_info->nhm_duration = (u16)(value32 & MASKLWORD);
|
|
}
|
|
else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
|
|
value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT_11N);
|
ccx_info->nhm_result[0] = (u8)(value32 & MASKBYTE0);
|
ccx_info->nhm_result[1] = (u8)((value32 & MASKBYTE1) >> 8);
|
ccx_info->nhm_result[2] = (u8)((value32 & MASKBYTE2) >> 16);
|
ccx_info->nhm_result[3] = (u8)((value32 & MASKBYTE3) >> 24);
|
|
value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT7_TO_CNT4_11N);
|
ccx_info->nhm_result[4] = (u8)(value32 & MASKBYTE0);
|
ccx_info->nhm_result[5] = (u8)((value32 & MASKBYTE1) >> 8);
|
ccx_info->nhm_result[6] = (u8)((value32 & MASKBYTE2) >> 16);
|
ccx_info->nhm_result[7] = (u8)((value32 & MASKBYTE3) >> 24);
|
|
value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT9_TO_CNT8_11N);
|
ccx_info->nhm_result[8] = (u8)((value32 & MASKBYTE2) >> 16);
|
ccx_info->nhm_result[9] = (u8)((value32 & MASKBYTE3) >> 24);
|
|
value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT10_TO_CNT11_11N);
|
ccx_info->nhm_result[10] = (u8)((value32 & MASKBYTE2) >> 16);
|
ccx_info->nhm_result[11] = (u8)((value32 & MASKBYTE3) >> 24);
|
|
/*Get NHM duration*/
|
value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT10_TO_CNT11_11N);
|
ccx_info->nhm_duration = (u16)(value32 & MASKLWORD);
|
|
}
|
|
/* sum all nhm_result */
|
ccx_info->nhm_result_total = 0;
|
for (i = 0; i <= 11; i++)
|
ccx_info->nhm_result_total += ccx_info->nhm_result[i];
|
|
PHYDM_DBG(p_dm, DBG_ENV_MNTR,
|
("nhm_result=(H->L)[%d %d %d %d (igi) %d %d %d %d %d %d %d %d]\n",
|
ccx_info->nhm_result[11], ccx_info->nhm_result[10], ccx_info->nhm_result[9],
|
ccx_info->nhm_result[8], ccx_info->nhm_result[7], ccx_info->nhm_result[6],
|
ccx_info->nhm_result[5], ccx_info->nhm_result[4], ccx_info->nhm_result[3],
|
ccx_info->nhm_result[2], ccx_info->nhm_result[1], ccx_info->nhm_result[0]));
|
}
|
|
boolean
|
phydm_check_nhm_rdy(
|
void *p_dm_void
|
)
|
{
|
struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
|
u8 i;
|
boolean is_ready = false;
|
|
if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
|
|
for (i = 0; i < 200; i++) {
|
ODM_delay_ms(1);
|
if (odm_get_bb_reg(p_dm, ODM_REG_NHM_DUR_READY_11AC, BIT(16))) {
|
is_ready = 1;
|
break;
|
}
|
}
|
}
|
|
else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
|
|
for (i = 0; i < 200; i++) {
|
ODM_delay_ms(1);
|
if (odm_get_bb_reg(p_dm, ODM_REG_NHM_DUR_READY_11AC, BIT(17))) {
|
is_ready = 1;
|
break;
|
}
|
}
|
}
|
PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]NHM rdy=%d\n", __FUNCTION__, is_ready));
|
return is_ready;
|
}
|
|
void
|
phydm_store_nhm_setting(
|
void *p_dm_void
|
)
|
{
|
struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
|
|
PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
|
|
if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
|
|
|
} else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
|
|
|
|
}
|
}
|
|
void
|
phydm_clm_setting(
|
void *p_dm_void
|
)
|
{
|
struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
|
struct _CCX_INFO *ccx_info = &p_dm->dm_ccx_info;
|
|
if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
|
|
odm_set_bb_reg(p_dm, ODM_REG_CCX_PERIOD_11AC, MASKLWORD, ccx_info->clm_period); /*4us sample 1 time*/
|
odm_set_bb_reg(p_dm, ODM_REG_CLM_11AC, BIT(8), 0x1); /*Enable CCX for CLM*/
|
|
} else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
|
|
odm_set_bb_reg(p_dm, ODM_REG_CCX_PERIOD_11N, MASKLWORD, ccx_info->clm_period);
|
odm_set_bb_reg(p_dm, ODM_REG_CLM_11N, BIT(8), 0x1); /*Enable CCX for CLM*/
|
}
|
|
PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]CLM period=%dus\n", __func__, ccx_info->clm_period * 4));
|
|
}
|
|
void
|
phydm_clm_trigger(
|
void *p_dm_void
|
)
|
{
|
struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
|
|
PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
|
|
if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
|
odm_set_bb_reg(p_dm, ODM_REG_CLM_11AC, BIT(0), 0x0); /*Trigger CLM*/
|
odm_set_bb_reg(p_dm, ODM_REG_CLM_11AC, BIT(0), 0x1);
|
} else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
|
odm_set_bb_reg(p_dm, ODM_REG_CLM_11N, BIT(0), 0x0); /*Trigger CLM*/
|
odm_set_bb_reg(p_dm, ODM_REG_CLM_11N, BIT(0), 0x1);
|
}
|
}
|
|
boolean
|
phydm_check_clm_rdy(
|
void *p_dm_void
|
)
|
{
|
struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
|
boolean is_ready = false;
|
u8 i;
|
|
if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
|
for (i = 0; i < 200; i++) {
|
ODM_delay_ms(1);
|
if (odm_get_bb_reg(p_dm, ODM_REG_CLM_RESULT_11AC, BIT(16))) {
|
is_ready = 1;
|
break;
|
}
|
}
|
} else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
|
for (i = 0; i < 200; i++) {
|
ODM_delay_ms(1);
|
if (odm_get_bb_reg(p_dm, ODM_REG_CLM_READY_11N, BIT(16))) {
|
is_ready = 1;
|
break;
|
}
|
}
|
}
|
PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]CLM rdy=%d\n", __FUNCTION__, is_ready));
|
return is_ready;
|
}
|
|
void
|
phydm_get_clm_result(
|
void *p_dm_void
|
)
|
{
|
struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
|
struct _CCX_INFO *ccx_info = &p_dm->dm_ccx_info;
|
|
u32 value32 = 0;
|
|
if (p_dm->support_ic_type & ODM_IC_11AC_SERIES)
|
value32 = odm_get_bb_reg(p_dm, ODM_REG_CLM_RESULT_11AC, MASKDWORD);
|
else if (p_dm->support_ic_type & ODM_IC_11N_SERIES)
|
value32 = odm_get_bb_reg(p_dm, ODM_REG_CLM_RESULT_11N, MASKDWORD);
|
|
ccx_info->clm_result = (u16)(value32 & MASKLWORD);
|
|
PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]CLM result = %dus\n", __func__, ccx_info->clm_result * 4));
|
|
}
|
|
void
|
phydm_ccx_monitor(
|
void *p_dm_void
|
)
|
{
|
struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
|
|
if (!(p_dm->support_ability & ODM_BB_ENV_MONITOR))
|
return;
|
|
PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
|
|
phydm_ccx_monitor_result(p_dm);
|
phydm_ccx_monitor_trigger(p_dm, (u16)0xC350); /*monitor 200ms*/
|
}
|
|
void
|
phydm_ccx_monitor_trigger(
|
void *p_dm_void,
|
u16 monitor_time /*unit 4us*/
|
)
|
{
|
u8 nhm_th[11], i, igi;
|
struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
|
struct _CCX_INFO *ccx_info = &p_dm->dm_ccx_info;
|
|
if (!(p_dm->support_ability & ODM_BB_ENV_MONITOR))
|
return;
|
|
PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
|
|
/* check if NHM threshold is changed */
|
if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
|
|
nhm_th[0] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE0);
|
nhm_th[1] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE1);
|
nhm_th[2] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE2);
|
nhm_th[3] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE3);
|
nhm_th[4] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE0);
|
nhm_th[5] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE1);
|
nhm_th[6] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE2);
|
nhm_th[7] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE3);
|
nhm_th[8] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH8_11AC, MASKBYTE0);
|
nhm_th[9] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE2);
|
nhm_th[10] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE3);
|
} else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
|
|
nhm_th[0] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE0);
|
nhm_th[1] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE1);
|
nhm_th[2] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE2);
|
nhm_th[3] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE3);
|
nhm_th[4] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE0);
|
nhm_th[5] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE1);
|
nhm_th[6] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE2);
|
nhm_th[7] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE3);
|
nhm_th[8] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH8_11N, MASKBYTE0);
|
nhm_th[9] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE2);
|
nhm_th[10] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE3);
|
}
|
|
for (i = 0; i <= 10; i++) {
|
|
if (nhm_th[i] != ccx_info->nhm_th[i]) {
|
PHYDM_DBG(p_dm, DBG_ENV_MNTR,
|
("nhm_th[%d] != ccx_info->nhm_th[%d]!!\n", i, i));
|
}
|
}
|
|
igi = (u8)odm_get_bb_reg(p_dm, 0xC50, MASKBYTE0);
|
phydm_set_nhm_th_by_igi(p_dm, igi);
|
|
ccx_info->nhm_period = monitor_time;
|
ccx_info->nhm_inexclude_cca = NHM_EXCLUDE_CCA;
|
ccx_info->nhm_inexclude_txon = NHM_EXCLUDE_TXON;
|
|
phydm_nhm_setting(p_dm, SET_NHM_SETTING);
|
phydm_nhm_trigger(p_dm);
|
|
ccx_info->echo_clm_en = true;
|
ccx_info->clm_period = monitor_time;
|
phydm_clm_setting(p_dm);
|
phydm_clm_trigger(p_dm);
|
|
}
|
|
void
|
phydm_ccx_monitor_result(
|
void *p_dm_void
|
)
|
{
|
struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
|
struct _CCX_INFO *ccx_info = &p_dm->dm_ccx_info;
|
u32 nhm_ratio = 0, clm_ratio = 0;
|
|
if (!(p_dm->support_ability & ODM_BB_ENV_MONITOR))
|
return;
|
|
if (phydm_check_nhm_rdy(p_dm))
|
phydm_get_nhm_result(p_dm);
|
|
if (phydm_check_clm_rdy(p_dm))
|
phydm_get_clm_result(p_dm);
|
|
if (ccx_info->clm_period != 0)
|
clm_ratio = (ccx_info->clm_result*100) / ccx_info->clm_period;
|
|
if (ccx_info->nhm_result_total != 0)
|
nhm_ratio = ((ccx_info->nhm_result_total - ccx_info->nhm_result[0])*100) >> 8;
|
|
ccx_info->clm_ratio = (u8)clm_ratio;
|
ccx_info->nhm_ratio = (u8)nhm_ratio;
|
|
PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]echo_igi=0x%x, nhm_ratio=%d, clm_ratio=%d\n",
|
__FUNCTION__, ccx_info->echo_igi, nhm_ratio, clm_ratio));
|
|
}
|
|
void
|
phydm_set_nhm_th_by_igi(
|
void *p_dm_void,
|
u8 igi
|
)
|
{
|
struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
|
struct _CCX_INFO *ccx_info = &p_dm->dm_ccx_info;
|
u8 i;
|
|
ccx_info->echo_igi = igi;
|
ccx_info->nhm_th[0] = (ccx_info->echo_igi - CCA_CAP) * IGI_TO_NHM_TH_MULTIPLIER;
|
for (i = 1; i <= 10; i++)
|
ccx_info->nhm_th[i] = ccx_info->nhm_th[0] + 2 * IGI_TO_NHM_TH_MULTIPLIER * i;
|
|
PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]echo_igi=0x%x\n", __FUNCTION__, ccx_info->echo_igi));
|
}
|
