/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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//============================================================
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// Description:
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//
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// This file is for 92CE/92CU dynamic mechanism only
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//
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//
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//============================================================
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#define _RTL8188E_DM_C_
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//============================================================
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// include files
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//============================================================
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#include <drv_types.h>
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#include <rtl8188e_hal.h>
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//============================================================
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// Global var
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//============================================================
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static VOID
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dm_CheckProtection(
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IN PADAPTER Adapter
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)
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{
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#if 0
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PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
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u1Byte CurRate, RateThreshold;
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if(pMgntInfo->pHTInfo->bCurBW40MHz)
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RateThreshold = MGN_MCS1;
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else
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RateThreshold = MGN_MCS3;
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if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold)
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{
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pMgntInfo->bDmDisableProtect = TRUE;
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DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate);
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}
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else
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{
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pMgntInfo->bDmDisableProtect = FALSE;
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DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate);
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}
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#endif
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}
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static VOID
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dm_CheckStatistics(
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IN PADAPTER Adapter
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)
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{
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#if 0
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if(!Adapter->MgntInfo.bMediaConnect)
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return;
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//2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly.
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rtw_hal_get_hwreg( Adapter, HW_VAR_INIT_TX_RATE, (pu1Byte)(&Adapter->TxStats.CurrentInitTxRate) );
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// Calculate current Tx Rate(Successful transmited!!)
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// Calculate current Rx Rate(Successful received!!)
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//for tx tx retry count
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rtw_hal_get_hwreg( Adapter, HW_VAR_RETRY_COUNT, (pu1Byte)(&Adapter->TxStats.NumTxRetryCount) );
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#endif
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}
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#ifdef CONFIG_SUPPORT_HW_WPS_PBC
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static void dm_CheckPbcGPIO(_adapter *padapter)
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{
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u8 tmp1byte;
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u8 bPbcPressed = _FALSE;
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if(!padapter->registrypriv.hw_wps_pbc)
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return;
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#ifdef CONFIG_USB_HCI
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tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
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tmp1byte |= (HAL_8188E_HW_GPIO_WPS_BIT);
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rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as output mode
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tmp1byte &= ~(HAL_8188E_HW_GPIO_WPS_BIT);
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rtw_write8(padapter, GPIO_IN, tmp1byte); //reset the floating voltage level
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tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
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tmp1byte &= ~(HAL_8188E_HW_GPIO_WPS_BIT);
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rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as input mode
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tmp1byte =rtw_read8(padapter, GPIO_IN);
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if (tmp1byte == 0xff)
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return ;
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if (tmp1byte&HAL_8188E_HW_GPIO_WPS_BIT)
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{
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bPbcPressed = _TRUE;
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}
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#else
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tmp1byte = rtw_read8(padapter, GPIO_IN);
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//RT_TRACE(COMP_IO, DBG_TRACE, ("dm_CheckPbcGPIO - %x\n", tmp1byte));
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if (tmp1byte == 0xff || padapter->init_adpt_in_progress)
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return ;
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if((tmp1byte&HAL_8188E_HW_GPIO_WPS_BIT)==0)
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{
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bPbcPressed = _TRUE;
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}
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#endif
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if( _TRUE == bPbcPressed)
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{
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// Here we only set bPbcPressed to true
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// After trigger PBC, the variable will be set to false
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DBG_8192C("CheckPbcGPIO - PBC is pressed\n");
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rtw_request_wps_pbc_event(padapter);
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}
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}
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#endif//#ifdef CONFIG_SUPPORT_HW_WPS_PBC
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#ifdef CONFIG_PCI_HCI
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//
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// Description:
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// Perform interrupt migration dynamically to reduce CPU utilization.
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//
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// Assumption:
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// 1. Do not enable migration under WIFI test.
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//
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// Created by Roger, 2010.03.05.
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//
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VOID
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dm_InterruptMigration(
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IN PADAPTER Adapter
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)
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
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BOOLEAN bCurrentIntMt, bCurrentACIntDisable;
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BOOLEAN IntMtToSet = _FALSE;
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BOOLEAN ACIntToSet = _FALSE;
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// Retrieve current interrupt migration and Tx four ACs IMR settings first.
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bCurrentIntMt = pHalData->bInterruptMigration;
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bCurrentACIntDisable = pHalData->bDisableTxInt;
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//
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// <Roger_Notes> Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics
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// when interrupt migration is set before. 2010.03.05.
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//
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if(!Adapter->registrypriv.wifi_spec &&
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(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) &&
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pmlmepriv->LinkDetectInfo.bHigherBusyTraffic)
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{
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IntMtToSet = _TRUE;
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// To check whether we should disable Tx interrupt or not.
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if(pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic )
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ACIntToSet = _TRUE;
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}
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//Update current settings.
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if( bCurrentIntMt != IntMtToSet ){
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DBG_8192C("%s(): Update interrrupt migration(%d)\n",__FUNCTION__,IntMtToSet);
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if(IntMtToSet)
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{
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//
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// <Roger_Notes> Set interrrupt migration timer and corresponging Tx/Rx counter.
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// timer 25ns*0xfa0=100us for 0xf packets.
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// 2010.03.05.
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//
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rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);// 0x306:Rx, 0x307:Tx
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pHalData->bInterruptMigration = IntMtToSet;
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}
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else
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{
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// Reset all interrupt migration settings.
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rtw_write32(Adapter, REG_INT_MIG, 0);
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pHalData->bInterruptMigration = IntMtToSet;
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}
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}
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/*if( bCurrentACIntDisable != ACIntToSet ){
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DBG_8192C("%s(): Update AC interrrupt(%d)\n",__FUNCTION__,ACIntToSet);
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if(ACIntToSet) // Disable four ACs interrupts.
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{
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//
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// <Roger_Notes> Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization.
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// When extremely highly Rx OK occurs, we will disable Tx interrupts.
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// 2010.03.05.
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//
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UpdateInterruptMask8192CE( Adapter, 0, RT_AC_INT_MASKS );
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pHalData->bDisableTxInt = ACIntToSet;
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}
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else// Enable four ACs interrupts.
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{
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UpdateInterruptMask8192CE( Adapter, RT_AC_INT_MASKS, 0 );
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pHalData->bDisableTxInt = ACIntToSet;
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}
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}*/
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}
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#endif
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//
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// Initialize GPIO setting registers
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//
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static void
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dm_InitGPIOSetting(
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IN PADAPTER Adapter
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)
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{
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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u8 tmp1byte;
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tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG);
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tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT);
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rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte);
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}
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//============================================================
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// functions
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//============================================================
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static void Init_ODM_ComInfo_88E(PADAPTER Adapter)
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{
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
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u32 SupportAbility = 0;
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u8 cut_ver,fab_ver;
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Init_ODM_ComInfo(Adapter);
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ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_IC_TYPE,ODM_RTL8188E);
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fab_ver = ODM_TSMC;
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cut_ver = ODM_CUT_A;
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if(IS_VENDOR_8188E_I_CUT_SERIES(Adapter))
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cut_ver = ODM_CUT_I;
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ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_FAB_VER,fab_ver);
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ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_CUT_VER,cut_ver);
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ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType);
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#ifdef CONFIG_DISABLE_ODM
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SupportAbility = 0;
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#else
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SupportAbility = ODM_RF_CALIBRATION |
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ODM_RF_TX_PWR_TRACK
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;
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/* if(pHalData->AntDivCfg)
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SupportAbility |= ODM_BB_ANT_DIV; */
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#endif
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ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,SupportAbility);
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}
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static void Update_ODM_ComInfo_88E(PADAPTER Adapter)
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{
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
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u32 SupportAbility = 0;
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int i;
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SupportAbility = 0
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| ODM_BB_DIG
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| ODM_BB_RA_MASK
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| ODM_BB_DYNAMIC_TXPWR
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| ODM_BB_FA_CNT
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| ODM_BB_RSSI_MONITOR
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| ODM_BB_CCK_PD
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//| ODM_BB_PWR_SAVE
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| ODM_BB_CFO_TRACKING
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| ODM_RF_CALIBRATION
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| ODM_RF_TX_PWR_TRACK
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| ODM_BB_NHM_CNT
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| ODM_BB_PRIMARY_CCA
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// | ODM_BB_PWR_TRAIN
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;
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if (rtw_odm_adaptivity_needed(Adapter) == _TRUE) {
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rtw_odm_adaptivity_config_msg(RTW_DBGDUMP, Adapter);
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SupportAbility |= ODM_BB_ADAPTIVITY;
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}
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if (!Adapter->registrypriv.qos_opt_enable) {
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SupportAbility |= ODM_MAC_EDCA_TURBO;
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}
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if(pHalData->AntDivCfg)
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SupportAbility |= ODM_BB_ANT_DIV;
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#if (MP_DRIVER==1)
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if (Adapter->registrypriv.mp_mode == 1) {
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SupportAbility = 0
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| ODM_RF_CALIBRATION
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| ODM_RF_TX_PWR_TRACK
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;
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}
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#endif//(MP_DRIVER==1)
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#ifdef CONFIG_DISABLE_ODM
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SupportAbility = 0;
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#endif//CONFIG_DISABLE_ODM
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ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,SupportAbility);
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ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType);
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}
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void
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rtl8188e_InitHalDm(
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IN PADAPTER Adapter
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)
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{
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
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u8 i;
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#ifdef CONFIG_USB_HCI
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dm_InitGPIOSetting(Adapter);
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#endif
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pHalData->DM_Type = DM_Type_ByDriver;
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Update_ODM_ComInfo_88E(Adapter);
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ODM_DMInit(pDM_Odm);
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}
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VOID
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rtl8188e_HalDmWatchDog(
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IN PADAPTER Adapter
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)
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{
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BOOLEAN bFwCurrentInPSMode = _FALSE;
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BOOLEAN bFwPSAwake = _TRUE;
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
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#ifdef CONFIG_CONCURRENT_MODE
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PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
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#endif //CONFIG_CONCURRENT_MODE
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_func_enter_;
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if (!rtw_is_hw_init_completed(Adapter))
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goto skip_dm;
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#ifdef CONFIG_LPS
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bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode;
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rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake));
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#endif
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#ifdef CONFIG_P2P_PS
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// Fw is under p2p powersaving mode, driver should stop dynamic mechanism.
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// modifed by thomas. 2011.06.11.
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if(Adapter->wdinfo.p2p_ps_mode)
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bFwPSAwake = _FALSE;
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#endif //CONFIG_P2P_PS
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if ((rtw_is_hw_init_completed(Adapter))
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&& ((!bFwCurrentInPSMode) && bFwPSAwake)) {
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//
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// Calculate Tx/Rx statistics.
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//
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dm_CheckStatistics(Adapter);
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rtw_hal_check_rxfifo_full(Adapter);
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//
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// Dynamically switch RTS/CTS protection.
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//
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//dm_CheckProtection(Adapter);
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#ifdef CONFIG_PCI_HCI
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// 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput.
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// Tx Migration settings.
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//dm_InterruptMigration(Adapter);
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//if(Adapter->HalFunc.TxCheckStuckHandler(Adapter))
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// PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem));
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#endif
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}
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//ODM
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if (rtw_is_hw_init_completed(Adapter)) {
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u8 bLinked=_FALSE;
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u8 bsta_state=_FALSE;
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#ifdef CONFIG_DISABLE_ODM
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pHalData->odmpriv.SupportAbility = 0;
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#endif
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if(rtw_linked_check(Adapter)){
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bLinked = _TRUE;
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if (check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE))
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bsta_state = _TRUE;
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}
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#ifdef CONFIG_CONCURRENT_MODE
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if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter)){
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bLinked = _TRUE;
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if(pbuddy_adapter && check_fwstate(&pbuddy_adapter->mlmepriv, WIFI_STATION_STATE))
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bsta_state = _TRUE;
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}
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#endif //CONFIG_CONCURRENT_MODE
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ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_LINK, bLinked);
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ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_STATION_STATE, bsta_state);
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ODM_DMWatchdog(&pHalData->odmpriv);
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}
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skip_dm:
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#ifdef CONFIG_SUPPORT_HW_WPS_PBC
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// Check GPIO to determine current Pbc status.
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dm_CheckPbcGPIO(Adapter);
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#endif
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return;
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}
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void rtl8188e_init_dm_priv(IN PADAPTER Adapter)
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{
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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PDM_ODM_T podmpriv = &pHalData->odmpriv;
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//_rtw_spinlock_init(&(pHalData->odm_stainfo_lock));
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Init_ODM_ComInfo_88E(Adapter);
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ODM_InitAllTimers(podmpriv );
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PHYDM_InitDebugSetting(podmpriv);
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}
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void rtl8188e_deinit_dm_priv(IN PADAPTER Adapter)
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{
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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PDM_ODM_T podmpriv = &pHalData->odmpriv;
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//_rtw_spinlock_free(&pHalData->odm_stainfo_lock);
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ODM_CancelAllTimers(podmpriv);
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}
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#ifdef CONFIG_ANTENNA_DIVERSITY
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// Add new function to reset the state of antenna diversity before link.
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//
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// Compare RSSI for deciding antenna
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void AntDivCompare8188E(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src)
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{
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//PADAPTER Adapter = pDM_Odm->Adapter ;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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if(0 != pHalData->AntDivCfg )
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{
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//DBG_8192C("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi),
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// src->Rssi,query_rx_pwr_percentage(src->Rssi));
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//select optimum_antenna for before linked =>For antenna diversity
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if(dst->Rssi >= src->Rssi )//keep org parameter
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{
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src->Rssi = dst->Rssi;
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src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna;
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}
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}
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}
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// Add new function to reset the state of antenna diversity before link.
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u8 AntDivBeforeLink8188E(PADAPTER Adapter )
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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PDM_ODM_T pDM_Odm =&pHalData->odmpriv;
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SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
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struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
|
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// Condition that does not need to use antenna diversity.
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if(pHalData->AntDivCfg==0)
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{
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//DBG_8192C("odm_AntDivBeforeLink8192C(): No AntDiv Mechanism.\n");
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return _FALSE;
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}
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if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
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{
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return _FALSE;
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}
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|
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if(pDM_SWAT_Table->SWAS_NoLink_State == 0){
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//switch channel
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pDM_SWAT_Table->SWAS_NoLink_State = 1;
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pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?AUX_ANT:MAIN_ANT;
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//PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, pDM_SWAT_Table->CurAntenna);
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rtw_antenna_select_cmd(Adapter, pDM_SWAT_Table->CurAntenna, _FALSE);
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//DBG_8192C("%s change antenna to ANT_( %s ).....\n",__FUNCTION__, (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"MAIN":"AUX");
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return _TRUE;
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}
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else
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{
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pDM_SWAT_Table->SWAS_NoLink_State = 0;
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return _FALSE;
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}
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|
}
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#endif
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|
