/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __NVKM_SECBOOT_ACR_R370_H__
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#define __NVKM_SECBOOT_ACR_R370_H__
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#include "priv.h"
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struct hsf_load_header;
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/* Same as acr_r361_flcn_bl_desc, plus argc/argv */
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struct acr_r370_flcn_bl_desc {
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u32 reserved[4];
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u32 signature[4];
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u32 ctx_dma;
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struct flcn_u64 code_dma_base;
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u32 non_sec_code_off;
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u32 non_sec_code_size;
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u32 sec_code_off;
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u32 sec_code_size;
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u32 code_entry_point;
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struct flcn_u64 data_dma_base;
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u32 data_size;
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u32 argc;
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u32 argv;
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};
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void acr_r370_generate_hs_bl_desc(const struct hsf_load_header *, void *, u64);
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extern const struct acr_r352_ls_func acr_r370_ls_fecs_func;
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extern const struct acr_r352_ls_func acr_r370_ls_gpccs_func;
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#endif
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