/*
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* Copyright 2018 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#define gv100_dmaobj(p) container_of((p), struct gv100_dmaobj, base)
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#include "user.h"
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#include <core/client.h>
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#include <core/gpuobj.h>
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#include <subdev/fb.h>
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#include <nvif/cl0002.h>
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#include <nvif/unpack.h>
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struct gv100_dmaobj {
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struct nvkm_dmaobj base;
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u32 flags0;
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};
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static int
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gv100_dmaobj_bind(struct nvkm_dmaobj *base, struct nvkm_gpuobj *parent,
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int align, struct nvkm_gpuobj **pgpuobj)
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{
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struct gv100_dmaobj *dmaobj = gv100_dmaobj(base);
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struct nvkm_device *device = dmaobj->base.dma->engine.subdev.device;
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u64 start = dmaobj->base.start >> 8;
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u64 limit = dmaobj->base.limit >> 8;
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int ret;
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ret = nvkm_gpuobj_new(device, 24, align, false, parent, pgpuobj);
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if (ret == 0) {
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nvkm_kmap(*pgpuobj);
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nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0);
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nvkm_wo32(*pgpuobj, 0x04, lower_32_bits(start));
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nvkm_wo32(*pgpuobj, 0x08, upper_32_bits(start));
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nvkm_wo32(*pgpuobj, 0x0c, lower_32_bits(limit));
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nvkm_wo32(*pgpuobj, 0x10, upper_32_bits(limit));
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nvkm_done(*pgpuobj);
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}
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return ret;
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}
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static const struct nvkm_dmaobj_func
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gv100_dmaobj_func = {
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.bind = gv100_dmaobj_bind,
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};
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int
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gv100_dmaobj_new(struct nvkm_dma *dma, const struct nvkm_oclass *oclass,
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void *data, u32 size, struct nvkm_dmaobj **pdmaobj)
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{
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union {
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struct gf119_dma_v0 v0;
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} *args;
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struct nvkm_object *parent = oclass->parent;
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struct gv100_dmaobj *dmaobj;
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u32 kind, page;
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int ret;
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if (!(dmaobj = kzalloc(sizeof(*dmaobj), GFP_KERNEL)))
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return -ENOMEM;
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*pdmaobj = &dmaobj->base;
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ret = nvkm_dmaobj_ctor(&gv100_dmaobj_func, dma, oclass,
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&data, &size, &dmaobj->base);
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if (ret)
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return ret;
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ret = -ENOSYS;
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args = data;
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nvif_ioctl(parent, "create gv100 dma size %d\n", size);
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if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {
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nvif_ioctl(parent,
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"create gv100 dma vers %d page %d kind %02x\n",
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args->v0.version, args->v0.page, args->v0.kind);
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kind = args->v0.kind != 0;
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page = args->v0.page != 0;
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} else
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if (size == 0) {
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kind = 0;
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page = GF119_DMA_V0_PAGE_SP;
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} else
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return ret;
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if (kind)
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dmaobj->flags0 |= 0x00100000;
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if (page)
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dmaobj->flags0 |= 0x00000040;
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dmaobj->flags0 |= 0x00000004; /* rw */
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switch (dmaobj->base.target) {
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case NV_MEM_TARGET_VRAM : dmaobj->flags0 |= 0x00000001; break;
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case NV_MEM_TARGET_PCI : dmaobj->flags0 |= 0x00000002; break;
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case NV_MEM_TARGET_PCI_NOSNOOP: dmaobj->flags0 |= 0x00000003; break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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