/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "channv50.h"
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#include <core/ramht.h>
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#include <subdev/timer.h>
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int
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gf119_disp_dmac_bind(struct nv50_disp_chan *chan,
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struct nvkm_object *object, u32 handle)
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{
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return nvkm_ramht_insert(chan->disp->ramht, object,
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chan->chid.user, -9, handle,
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chan->chid.user << 27 | 0x00000001);
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}
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void
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gf119_disp_dmac_fini(struct nv50_disp_chan *chan)
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{
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struct nvkm_subdev *subdev = &chan->disp->base.engine.subdev;
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struct nvkm_device *device = subdev->device;
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int ctrl = chan->chid.ctrl;
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int user = chan->chid.user;
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/* deactivate channel */
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nvkm_mask(device, 0x610490 + (ctrl * 0x0010), 0x00001010, 0x00001000);
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nvkm_mask(device, 0x610490 + (ctrl * 0x0010), 0x00000003, 0x00000000);
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if (nvkm_msec(device, 2000,
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if (!(nvkm_rd32(device, 0x610490 + (ctrl * 0x10)) & 0x001e0000))
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break;
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) < 0) {
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nvkm_error(subdev, "ch %d fini: %08x\n", user,
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nvkm_rd32(device, 0x610490 + (ctrl * 0x10)));
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}
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}
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static int
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gf119_disp_dmac_init(struct nv50_disp_chan *chan)
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{
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struct nvkm_subdev *subdev = &chan->disp->base.engine.subdev;
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struct nvkm_device *device = subdev->device;
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int ctrl = chan->chid.ctrl;
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int user = chan->chid.user;
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/* initialise channel for dma command submission */
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nvkm_wr32(device, 0x610494 + (ctrl * 0x0010), chan->push);
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nvkm_wr32(device, 0x610498 + (ctrl * 0x0010), 0x00010000);
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nvkm_wr32(device, 0x61049c + (ctrl * 0x0010), 0x00000001);
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nvkm_mask(device, 0x610490 + (ctrl * 0x0010), 0x00000010, 0x00000010);
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nvkm_wr32(device, 0x640000 + (ctrl * 0x1000), 0x00000000);
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nvkm_wr32(device, 0x610490 + (ctrl * 0x0010), 0x00000013);
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/* wait for it to go inactive */
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if (nvkm_msec(device, 2000,
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if (!(nvkm_rd32(device, 0x610490 + (ctrl * 0x10)) & 0x80000000))
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break;
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) < 0) {
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nvkm_error(subdev, "ch %d init: %08x\n", user,
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nvkm_rd32(device, 0x610490 + (ctrl * 0x10)));
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return -EBUSY;
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}
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return 0;
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}
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const struct nv50_disp_chan_func
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gf119_disp_dmac_func = {
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.init = gf119_disp_dmac_init,
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.fini = gf119_disp_dmac_fini,
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.intr = gf119_disp_chan_intr,
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.user = nv50_disp_chan_user,
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.bind = gf119_disp_dmac_bind,
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};
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