/*
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* Copyright 2012-16 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef __DISPLAY_CLOCK_H__
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#define __DISPLAY_CLOCK_H__
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#include "dm_services_types.h"
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#include "dc.h"
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/* Structure containing all state-dependent clocks
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* (dependent on "enum clocks_state") */
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struct state_dependent_clocks {
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int display_clk_khz;
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int pixel_clk_khz;
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};
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struct dccg {
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struct dc_context *ctx;
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const struct display_clock_funcs *funcs;
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enum dm_pp_clocks_state max_clks_state;
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enum dm_pp_clocks_state cur_min_clks_state;
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struct dc_clocks clks;
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};
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struct display_clock_funcs {
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void (*update_clocks)(struct dccg *dccg,
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struct dc_clocks *new_clocks,
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bool safe_to_lower);
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int (*set_dispclk)(struct dccg *dccg,
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int requested_clock_khz);
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int (*get_dp_ref_clk_frequency)(struct dccg *dccg);
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};
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#endif /* __DISPLAY_CLOCK_H__ */
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