/*
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* Copyright 2012-16 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#include "dm_services.h"
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#include "include/i2caux_interface.h"
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#include "../i2caux.h"
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#include "../engine.h"
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#include "../i2c_engine.h"
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#include "../i2c_sw_engine.h"
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#include "../i2c_hw_engine.h"
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#include "../dce110/i2c_hw_engine_dce110.h"
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#include "../dce110/aux_engine_dce110.h"
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#include "../dce110/i2caux_dce110.h"
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#include "dce/dce_12_0_offset.h"
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#include "dce/dce_12_0_sh_mask.h"
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#include "soc15_hw_ip.h"
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#include "vega10_ip_offset.h"
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/* begin *********************
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* macros to expend register list macro defined in HW object header file */
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#define BASE_INNER(seg) \
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DCE_BASE__INST0_SEG ## seg
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/* compile time expand base address. */
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#define BASE(seg) \
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BASE_INNER(seg)
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#define SR(reg_name)\
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.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
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mm ## reg_name
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#define SRI(reg_name, block, id)\
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.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
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mm ## block ## id ## _ ## reg_name
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/* macros to expend register list macro defined in HW object header file
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* end *********************/
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#define aux_regs(id)\
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[id] = {\
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AUX_COMMON_REG_LIST(id), \
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.AUX_RESET_MASK = DP_AUX0_AUX_CONTROL__AUX_RESET_MASK \
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}
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static const struct dce110_aux_registers dce120_aux_regs[] = {
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aux_regs(0),
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aux_regs(1),
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aux_regs(2),
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aux_regs(3),
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aux_regs(4),
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aux_regs(5),
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};
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#define hw_engine_regs(id)\
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{\
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I2C_HW_ENGINE_COMMON_REG_LIST(id) \
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}
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static const struct dce110_i2c_hw_engine_registers dce120_hw_engine_regs[] = {
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hw_engine_regs(1),
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hw_engine_regs(2),
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hw_engine_regs(3),
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hw_engine_regs(4),
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hw_engine_regs(5),
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hw_engine_regs(6)
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};
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static const struct dce110_i2c_hw_engine_shift i2c_shift = {
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I2C_COMMON_MASK_SH_LIST_DCE110(__SHIFT)
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};
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static const struct dce110_i2c_hw_engine_mask i2c_mask = {
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I2C_COMMON_MASK_SH_LIST_DCE110(_MASK)
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};
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struct i2caux *dal_i2caux_dce120_create(
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struct dc_context *ctx)
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{
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struct i2caux_dce110 *i2caux_dce110 =
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kzalloc(sizeof(struct i2caux_dce110), GFP_KERNEL);
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if (!i2caux_dce110) {
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ASSERT_CRITICAL(false);
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return NULL;
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}
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dal_i2caux_dce110_construct(i2caux_dce110,
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ctx,
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ARRAY_SIZE(dce120_aux_regs),
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dce120_aux_regs,
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dce120_hw_engine_regs,
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&i2c_shift,
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&i2c_mask);
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return &i2caux_dce110->base;
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}
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