/*
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* Copyright 2012-15 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#include "dm_services.h"
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#include "dc.h"
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#include "core_types.h"
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#include "resource.h"
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#include "ipp.h"
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#include "timing_generator.h"
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#define DC_LOGGER dc->ctx->logger
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/*******************************************************************************
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* Private functions
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******************************************************************************/
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void update_stream_signal(struct dc_stream_state *stream)
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{
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struct dc_sink *dc_sink = stream->sink;
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if (dc_sink->sink_signal == SIGNAL_TYPE_NONE)
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stream->signal = stream->sink->link->connector_signal;
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else
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stream->signal = dc_sink->sink_signal;
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if (dc_is_dvi_signal(stream->signal)) {
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if (stream->ctx->dc->caps.dual_link_dvi &&
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stream->timing.pix_clk_khz > TMDS_MAX_PIXEL_CLOCK &&
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stream->sink->sink_signal != SIGNAL_TYPE_DVI_SINGLE_LINK)
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stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK;
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else
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stream->signal = SIGNAL_TYPE_DVI_SINGLE_LINK;
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}
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}
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static void construct(struct dc_stream_state *stream,
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struct dc_sink *dc_sink_data)
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{
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uint32_t i = 0;
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stream->sink = dc_sink_data;
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stream->ctx = stream->sink->ctx;
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dc_sink_retain(dc_sink_data);
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/* Copy audio modes */
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/* TODO - Remove this translation */
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for (i = 0; i < (dc_sink_data->edid_caps.audio_mode_count); i++)
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{
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stream->audio_info.modes[i].channel_count = dc_sink_data->edid_caps.audio_modes[i].channel_count;
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stream->audio_info.modes[i].format_code = dc_sink_data->edid_caps.audio_modes[i].format_code;
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stream->audio_info.modes[i].sample_rates.all = dc_sink_data->edid_caps.audio_modes[i].sample_rate;
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stream->audio_info.modes[i].sample_size = dc_sink_data->edid_caps.audio_modes[i].sample_size;
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}
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stream->audio_info.mode_count = dc_sink_data->edid_caps.audio_mode_count;
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stream->audio_info.audio_latency = dc_sink_data->edid_caps.audio_latency;
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stream->audio_info.video_latency = dc_sink_data->edid_caps.video_latency;
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memmove(
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stream->audio_info.display_name,
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dc_sink_data->edid_caps.display_name,
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AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS);
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stream->audio_info.manufacture_id = dc_sink_data->edid_caps.manufacturer_id;
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stream->audio_info.product_id = dc_sink_data->edid_caps.product_id;
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stream->audio_info.flags.all = dc_sink_data->edid_caps.speaker_flags;
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if (dc_sink_data->dc_container_id != NULL) {
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struct dc_container_id *dc_container_id = dc_sink_data->dc_container_id;
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stream->audio_info.port_id[0] = dc_container_id->portId[0];
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stream->audio_info.port_id[1] = dc_container_id->portId[1];
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} else {
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/* TODO - WindowDM has implemented,
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other DMs need Unhardcode port_id */
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stream->audio_info.port_id[0] = 0x5558859e;
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stream->audio_info.port_id[1] = 0xd989449;
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}
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/* EDID CAP translation for HDMI 2.0 */
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stream->timing.flags.LTE_340MCSC_SCRAMBLE = dc_sink_data->edid_caps.lte_340mcsc_scramble;
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stream->status.link = stream->sink->link;
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update_stream_signal(stream);
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stream->out_transfer_func = dc_create_transfer_func();
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stream->out_transfer_func->type = TF_TYPE_BYPASS;
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}
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static void destruct(struct dc_stream_state *stream)
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{
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dc_sink_release(stream->sink);
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if (stream->out_transfer_func != NULL) {
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dc_transfer_func_release(stream->out_transfer_func);
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stream->out_transfer_func = NULL;
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}
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}
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void dc_stream_retain(struct dc_stream_state *stream)
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{
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kref_get(&stream->refcount);
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}
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static void dc_stream_free(struct kref *kref)
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{
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struct dc_stream_state *stream = container_of(kref, struct dc_stream_state, refcount);
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destruct(stream);
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kfree(stream);
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}
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void dc_stream_release(struct dc_stream_state *stream)
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{
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if (stream != NULL) {
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kref_put(&stream->refcount, dc_stream_free);
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}
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}
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struct dc_stream_state *dc_create_stream_for_sink(
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struct dc_sink *sink)
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{
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struct dc_stream_state *stream;
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if (sink == NULL)
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return NULL;
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stream = kzalloc(sizeof(struct dc_stream_state), GFP_KERNEL);
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if (stream == NULL)
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return NULL;
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construct(stream, sink);
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kref_init(&stream->refcount);
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return stream;
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}
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struct dc_stream_status *dc_stream_get_status(
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struct dc_stream_state *stream)
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{
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uint8_t i;
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struct dc *dc = stream->ctx->dc;
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for (i = 0; i < dc->current_state->stream_count; i++) {
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if (stream == dc->current_state->streams[i])
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return &dc->current_state->stream_status[i];
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}
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return NULL;
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}
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/**
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* Update the cursor attributes and set cursor surface address
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*/
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bool dc_stream_set_cursor_attributes(
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struct dc_stream_state *stream,
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const struct dc_cursor_attributes *attributes)
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{
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int i;
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struct dc *core_dc;
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struct resource_context *res_ctx;
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struct pipe_ctx *pipe_to_program = NULL;
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if (NULL == stream) {
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dm_error("DC: dc_stream is NULL!\n");
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return false;
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}
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if (NULL == attributes) {
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dm_error("DC: attributes is NULL!\n");
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return false;
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}
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if (attributes->address.quad_part == 0) {
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dm_output_to_console("DC: Cursor address is 0!\n");
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return false;
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}
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core_dc = stream->ctx->dc;
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res_ctx = &core_dc->current_state->res_ctx;
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stream->cursor_attributes = *attributes;
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for (i = 0; i < MAX_PIPES; i++) {
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struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
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if (pipe_ctx->stream != stream)
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continue;
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if (pipe_ctx->top_pipe && pipe_ctx->plane_state != pipe_ctx->top_pipe->plane_state)
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continue;
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if (!pipe_to_program) {
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pipe_to_program = pipe_ctx;
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core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, true);
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}
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core_dc->hwss.set_cursor_attribute(pipe_ctx);
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if (core_dc->hwss.set_cursor_sdr_white_level)
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core_dc->hwss.set_cursor_sdr_white_level(pipe_ctx);
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}
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if (pipe_to_program)
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core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, false);
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return true;
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}
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bool dc_stream_set_cursor_position(
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struct dc_stream_state *stream,
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const struct dc_cursor_position *position)
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{
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int i;
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struct dc *core_dc;
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struct resource_context *res_ctx;
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struct pipe_ctx *pipe_to_program = NULL;
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if (NULL == stream) {
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dm_error("DC: dc_stream is NULL!\n");
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return false;
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}
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if (NULL == position) {
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dm_error("DC: cursor position is NULL!\n");
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return false;
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}
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core_dc = stream->ctx->dc;
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res_ctx = &core_dc->current_state->res_ctx;
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stream->cursor_position = *position;
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for (i = 0; i < MAX_PIPES; i++) {
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struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
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if (pipe_ctx->stream != stream ||
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(!pipe_ctx->plane_res.mi && !pipe_ctx->plane_res.hubp) ||
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!pipe_ctx->plane_state ||
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(!pipe_ctx->plane_res.xfm && !pipe_ctx->plane_res.dpp) ||
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!pipe_ctx->plane_res.ipp)
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continue;
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if (!pipe_to_program) {
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pipe_to_program = pipe_ctx;
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core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, true);
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}
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core_dc->hwss.set_cursor_position(pipe_ctx);
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}
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if (pipe_to_program)
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core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, false);
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return true;
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}
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uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream)
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{
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uint8_t i;
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struct dc *core_dc = stream->ctx->dc;
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struct resource_context *res_ctx =
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&core_dc->current_state->res_ctx;
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for (i = 0; i < MAX_PIPES; i++) {
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struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg;
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if (res_ctx->pipe_ctx[i].stream != stream)
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continue;
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return tg->funcs->get_frame_count(tg);
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}
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return 0;
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}
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bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,
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uint32_t *v_blank_start,
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uint32_t *v_blank_end,
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uint32_t *h_position,
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uint32_t *v_position)
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{
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uint8_t i;
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bool ret = false;
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struct dc *core_dc = stream->ctx->dc;
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struct resource_context *res_ctx =
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&core_dc->current_state->res_ctx;
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for (i = 0; i < MAX_PIPES; i++) {
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struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg;
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if (res_ctx->pipe_ctx[i].stream != stream)
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continue;
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tg->funcs->get_scanoutpos(tg,
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v_blank_start,
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v_blank_end,
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h_position,
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v_position);
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ret = true;
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break;
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}
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return ret;
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}
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void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream)
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{
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DC_LOG_DC(
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"core_stream 0x%p: src: %d, %d, %d, %d; dst: %d, %d, %d, %d, colorSpace:%d\n",
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stream,
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stream->src.x,
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stream->src.y,
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stream->src.width,
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stream->src.height,
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stream->dst.x,
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stream->dst.y,
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stream->dst.width,
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stream->dst.height,
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stream->output_color_space);
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DC_LOG_DC(
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"\tpix_clk_khz: %d, h_total: %d, v_total: %d, pixelencoder:%d, displaycolorDepth:%d\n",
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stream->timing.pix_clk_khz,
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stream->timing.h_total,
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stream->timing.v_total,
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stream->timing.pixel_encoding,
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stream->timing.display_color_depth);
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DC_LOG_DC(
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"\tsink name: %s, serial: %d\n",
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stream->sink->edid_caps.display_name,
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stream->sink->edid_caps.serial_number);
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DC_LOG_DC(
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"\tlink: %d\n",
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stream->sink->link->link_index);
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}
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