Rockchip SoC Image Signal Processing unit v1
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----------------------------------------------
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Rockchip ISP1 is the Camera interface for the Rockchip series of SoCs
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which contains image processing, scaling, and compression funcitons.
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Required properties:
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- compatible: value should be one of the following
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"rockchip,rk1808-rkisp1";
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"rockchip,rk3288-rkisp1";
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"rockchip,rk3326-rkisp1";
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"rockchip,rk3368-rkisp1";
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"rockchip,rk3399-rkisp1";
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- reg : offset and length of the register set for the device.
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- interrupts: should contain ISP interrupt.
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- clocks: phandle to the required clocks.
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- clock-names: required clock name.
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- iommus: required a iommu node.
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port node
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-------------------
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The device node should contain one 'port' child node with child 'endpoint'
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nodes, according to the bindings defined in Documentation/devicetree/bindings/
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media/video-interfaces.txt.
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- endpoint(parallel):
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- remote-endpoint: Connecting to a sensor with a parallel video bus.
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- parallel_bus properties: Refer to Documentation/devicetree/bindings/
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media/video-interfaces.txt.
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- endpoint(mipi):
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- remote-endpoint: Connecting to Rockchip MIPI-DPHY,
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which is defined in rockchip-mipi-dphy.txt.
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The port node must contain at least one endpoint, either parallel or mipi.
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It could have multiple endpoints, but please note the hardware don't support
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two sensors work at a time, they are supposed to work asynchronously.
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Device node example
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-------------------
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isp0: isp0@ff910000 {
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compatible = "rockchip,rk3399-rkisp1";
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reg = <0x0 0xff910000 0x0 0x4000>;
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interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&cru SCLK_ISP0>,
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<&cru ACLK_ISP0>, <&cru ACLK_ISP0_WRAPPER>,
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<&cru HCLK_ISP0>, <&cru HCLK_ISP0_WRAPPER>;
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clock-names = "clk_isp",
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"aclk_isp", "aclk_isp_wrap",
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"hclk_isp", "hclk_isp_wrap";
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power-domains = <&power RK3399_PD_ISP0>;
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iommus = <&isp0_mmu>;
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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/* mipi */
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isp0_mipi_in: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&dphy_rx0_out>;
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};
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/* parallel */
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isp0_parallel_in: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&ov5640_out>;
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bus-width = <8>;
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};
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};
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};
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