/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
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2004, 2005, 2006
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Free Software Foundation, Inc.
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* SPDX-License-Identifier: GPL-2.0+
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*/
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!! libgcc routines for the Renesas / SuperH SH CPUs.
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!! Contributed by Steve Chamberlain.
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!! sac@cygnus.com
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!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
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!! recoded in assembly by Toshiyasu Morita
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!! tm@netcom.com
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/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
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ELF local label prefixes by J"orn Rennecke
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amylaar@cygnus.com */
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!
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! GLOBAL(ashlsi3)
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!
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! Entry:
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!
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! r4: Value to shift
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! r5: Shifts
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!
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! Exit:
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!
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! r0: Result
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!
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! Destroys:
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!
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! (none)
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!
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.global __ashlsi3
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.align 2
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__ashlsi3:
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mov #31,r0
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and r0,r5
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mova __ashlsi3_table,r0
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mov.b @(r0,r5),r5
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#ifdef __sh1__
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add r5,r0
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jmp @r0
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#else
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braf r5
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#endif
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mov r4,r0
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.align 2
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__ashlsi3_table:
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.byte __ashlsi3_0-__ashlsi3_table
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.byte __ashlsi3_1-__ashlsi3_table
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.byte __ashlsi3_2-__ashlsi3_table
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.byte __ashlsi3_3-__ashlsi3_table
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.byte __ashlsi3_4-__ashlsi3_table
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.byte __ashlsi3_5-__ashlsi3_table
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.byte __ashlsi3_6-__ashlsi3_table
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.byte __ashlsi3_7-__ashlsi3_table
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.byte __ashlsi3_8-__ashlsi3_table
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.byte __ashlsi3_9-__ashlsi3_table
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.byte __ashlsi3_10-__ashlsi3_table
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.byte __ashlsi3_11-__ashlsi3_table
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.byte __ashlsi3_12-__ashlsi3_table
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.byte __ashlsi3_13-__ashlsi3_table
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.byte __ashlsi3_14-__ashlsi3_table
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.byte __ashlsi3_15-__ashlsi3_table
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.byte __ashlsi3_16-__ashlsi3_table
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.byte __ashlsi3_17-__ashlsi3_table
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.byte __ashlsi3_18-__ashlsi3_table
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.byte __ashlsi3_19-__ashlsi3_table
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.byte __ashlsi3_20-__ashlsi3_table
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.byte __ashlsi3_21-__ashlsi3_table
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.byte __ashlsi3_22-__ashlsi3_table
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.byte __ashlsi3_23-__ashlsi3_table
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.byte __ashlsi3_24-__ashlsi3_table
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.byte __ashlsi3_25-__ashlsi3_table
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.byte __ashlsi3_26-__ashlsi3_table
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.byte __ashlsi3_27-__ashlsi3_table
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.byte __ashlsi3_28-__ashlsi3_table
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.byte __ashlsi3_29-__ashlsi3_table
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.byte __ashlsi3_30-__ashlsi3_table
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.byte __ashlsi3_31-__ashlsi3_table
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__ashlsi3_6:
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shll2 r0
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__ashlsi3_4:
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shll2 r0
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__ashlsi3_2:
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rts
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shll2 r0
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__ashlsi3_7:
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shll2 r0
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__ashlsi3_5:
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shll2 r0
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__ashlsi3_3:
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shll2 r0
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__ashlsi3_1:
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rts
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shll r0
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__ashlsi3_14:
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shll2 r0
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__ashlsi3_12:
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shll2 r0
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__ashlsi3_10:
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shll2 r0
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__ashlsi3_8:
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rts
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shll8 r0
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__ashlsi3_15:
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shll2 r0
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__ashlsi3_13:
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shll2 r0
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__ashlsi3_11:
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shll2 r0
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__ashlsi3_9:
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shll8 r0
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rts
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shll r0
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__ashlsi3_22:
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shll2 r0
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__ashlsi3_20:
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shll2 r0
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__ashlsi3_18:
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shll2 r0
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__ashlsi3_16:
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rts
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shll16 r0
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__ashlsi3_23:
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shll2 r0
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__ashlsi3_21:
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shll2 r0
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__ashlsi3_19:
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shll2 r0
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__ashlsi3_17:
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shll16 r0
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rts
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shll r0
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__ashlsi3_30:
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shll2 r0
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__ashlsi3_28:
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shll2 r0
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__ashlsi3_26:
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shll2 r0
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__ashlsi3_24:
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shll16 r0
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rts
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shll8 r0
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__ashlsi3_31:
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shll2 r0
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__ashlsi3_29:
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shll2 r0
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__ashlsi3_27:
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shll2 r0
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__ashlsi3_25:
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shll16 r0
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shll8 r0
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rts
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shll r0
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__ashlsi3_0:
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rts
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nop
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