/*
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* Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "qca,ar933x";
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "mips,mips24Kc";
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reg = <0>;
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};
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};
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clocks {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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xtal: xtal {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-output-names = "xtal";
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};
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};
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pinctrl {
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u-boot,dm-pre-reloc;
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compatible = "qca,ar933x-pinctrl";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x18040000 0x100>;
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};
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ahb {
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compatible = "simple-bus";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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apb {
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compatible = "simple-bus";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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ehci0: ehci@1b000100 {
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compatible = "generic-ehci";
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reg = <0x1b000100 0x100>;
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status = "disabled";
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};
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uart0: uart@18020000 {
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compatible = "qca,ar9330-uart";
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reg = <0x18020000 0x20>;
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interrupts = <128 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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gmac0: eth@0x19000000 {
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compatible = "qca,ag933x-mac";
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reg = <0x19000000 0x200>;
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phy = <&phy0>;
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phy-mode = "rmii";
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status = "disabled";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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};
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gmac1: eth@0x1a000000 {
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compatible = "qca,ag933x-mac";
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reg = <0x1a000000 0x200>;
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phy = <&phy0>;
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phy-mode = "rgmii";
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status = "disabled";
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};
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};
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spi0: spi@1f000000 {
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compatible = "qca,ar7100-spi";
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reg = <0x1f000000 0x10>;
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interrupts = <129 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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};
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