/*
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* (C) Copyright 2017 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <debug_uart.h>
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#include <dm.h>
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#include <ns16550.h>
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#include <ram.h>
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#include <spl.h>
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#include <version.h>
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#include <asm/io.h>
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#include <asm/arch/bootrom.h>
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#include <asm/arch/uart.h>
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#include <asm/arch-rockchip/sys_proto.h>
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#ifndef CONFIG_TPL_LIBCOMMON_SUPPORT
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#define CONFIG_SYS_NS16550_COM1 CONFIG_DEBUG_UART_BASE
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void puts(const char *str)
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{
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while (*str)
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putc(*str++);
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}
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void putc(char c)
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{
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if (c == '\n')
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NS16550_putc((NS16550_t)(CONFIG_SYS_NS16550_COM1), '\r');
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NS16550_putc((NS16550_t)(CONFIG_SYS_NS16550_COM1), c);
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}
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#endif /* CONFIG_TPL_LIBCOMMON_SUPPORT */
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#ifndef CONFIG_TPL_LIBGENERIC_SUPPORT
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int __weak timer_init(void)
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{
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return 0;
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}
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#ifdef CONFIG_ARM64
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/* for ARM64,it don't have define timer_init and __udelay except lib/timer.c */
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void __weak __udelay(unsigned long usec)
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{
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u64 i, j, count;
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asm volatile ("MRS %0, CNTPCT_EL0" : "=r"(count));
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i = count;
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/* usec to count,24MHz */
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j = usec * 24;
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i += j;
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while (1) {
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asm volatile ("MRS %0, CNTPCT_EL0" : "=r"(count));
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if (count > i)
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break;
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}
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}
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#else
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void __weak __udelay(unsigned long usec)
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{
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u32 nowl, nowu;
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u64 cur_count, end_count;
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asm volatile("mrrc p15, 0, %0, %1, c14" : "=r" (nowl), "=r" (nowu));
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cur_count = (u64)nowu << 32 | nowl;
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/* usec to count,24MHz */
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end_count = usec * 24 + cur_count;
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while (1) {
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asm volatile("mrrc p15, 0, %0, %1, c14" : "=r" (nowl),
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"=r" (nowu));
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cur_count = (u64)nowu << 32 | nowl;
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if (cur_count > end_count)
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break;
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}
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}
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#endif /* CONFIG_ARM64 */
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void udelay(unsigned long usec)
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{
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__udelay(usec);
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}
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void hang(void)
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{
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bootstage_error(BOOTSTAGE_ID_NEED_RESET);
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for (;;)
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;
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}
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#endif /* CONFIG_TPL_LIBGENERIC_SUPPORT */
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u32 spl_boot_device(void)
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{
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return BOOT_DEVICE_BOOTROM;
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}
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__weak void rockchip_stimer_init(void)
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{
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#ifndef CONFIG_ARM64
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asm volatile("mcr p15, 0, %0, c14, c0, 0"
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: : "r"(COUNTER_FREQUENCY));
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#elif CONFIG_IS_ENABLED(TINY_FRAMEWORK)
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/*
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* For ARM64,generally initialize CNTFRQ in start.S,
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* but if defined CONFIG_TPL_TINY_FRAMEWORK should skip start.S.
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* So initialize CNTFRQ to 24MHz here.
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*/
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asm volatile("msr CNTFRQ_EL0, %0"
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: : "r" (COUNTER_FREQUENCY));
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#endif
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writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
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writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
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writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
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writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
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}
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__weak int arch_cpu_init(void)
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{
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return 0;
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}
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void board_init_f(ulong dummy)
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{
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#if defined(CONFIG_SPL_FRAMEWORK) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
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struct udevice *dev;
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int ret;
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#endif
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rockchip_stimer_init();
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arch_cpu_init();
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#define EARLY_DEBUG
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#ifdef EARLY_DEBUG
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/*
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* Debug UART can be used from here if required:
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*
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* debug_uart_init();
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* printch('a');
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* printhex8(0x1234);
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* printascii("string");
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*/
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debug_uart_init();
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printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
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U_BOOT_TIME ")\n");
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#endif
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#if defined(CONFIG_SPL_FRAMEWORK) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
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ret = spl_early_init();
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if (ret) {
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debug("spl_early_init() failed: %d\n", ret);
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hang();
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}
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#endif
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/* Init ARM arch timer */
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timer_init();
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#if defined(CONFIG_SPL_FRAMEWORK) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret) {
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printf("DRAM init failed: %d\n", ret);
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return;
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}
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#else
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sdram_init();
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#endif
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#if defined(CONFIG_TPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_TPL_BOARD_INIT)
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back_to_bootrom(BROM_BOOT_NEXTSTAGE);
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#endif
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}
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#if !(defined(CONFIG_SPL_FRAMEWORK) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK))
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/* Place Holders */
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void board_init_r(gd_t *id, ulong dest_addr)
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{
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/*
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* Function attribute is no-return
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* This Function never executes
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*/
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while (1)
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;
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}
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#endif
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