/*
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* (C) Copyright 2022 Rockchip Electronics Co., Ltd.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* Example:
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* ramoops: ramoops@110000 {
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* compatible = "ramoops";
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* reg = <0x0 0x110000 0x0 0xe0000>;
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* boot-log-size = <0x8000>;
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* boot-log-count = <0x1>
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* console-size = <0x80000>;
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* pmsg-size = <0x30000>;
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* ftrace-size = <0x00000>;
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* record-size = <0x14000>;
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* };
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*/
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#include <common.h>
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#include <asm/arch/rk_atags.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define PERSISTENT_RAM_SIG (0x43474244)
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#define LOG_TYPE_MASK (0x00000fff)
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struct persistent_ram_buffer {
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u32 sig;
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u32 start;
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u32 size;
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u8 data[0];
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};
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enum log_type {
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LOG_TPL = 0,
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LOG_SPL,
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LOG_OPTEE,
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LOG_ATF,
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LOG_UBOOT,
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LOG_MAX = 12,
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};
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#if 0
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/*
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* This function is to be called by tpl/ddr.
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*
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* u32 'conf' definition:
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* [31:16] is pstore buffer base address (0x_[31:16]_0000), 64KB align.
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* [15:12] is pstore buffer size [15:12]*4KB.
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* [11:0] see 'enum log_type' per bit is for one stage, 1: enable, 0: disable.
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* [0] tpl(ddr)
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* [1] spl(miniloader)
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* [2] optee(bl32)
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* [3] atf(bl31)
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* [4] U-Boot
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* ...
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*/
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void pstore_atags_set_tag(u32 conf)
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{
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struct tag_pstore t;
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u32 addr = conf & 0xffff0000;
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u32 size = conf & 0x0000f000;
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int i = 0;
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/* handle special: 0 is 64KB but not 0KB */
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if (size == 0)
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size = 0x10000;
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/* is enabled log type ? */
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conf &= LOG_TYPE_MASK;
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if (conf == 0)
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return;
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t.version = 0;
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for (i = 0; i < LOG_MAX; i++) {
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if (conf & (1 << (i))) {
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t.buf[i].addr = addr;
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t.buf[i].size = size;
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} else {
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t.buf[i].addr = 0x0;
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t.buf[i].size = 0x0;
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}
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}
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atags_set_tag(ATAG_PSTORE, &t);
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}
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#endif
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int param_parse_pstore(void)
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{
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struct persistent_ram_buffer *rb = NULL;
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u32 pstore_size = 0;
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#if defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS) && (CONFIG_PERSISTENT_RAM_ADDR == 0)
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struct tag *t;
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gd->pstore_addr = 0;
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gd->pstore_size = 0;
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t = atags_get_tag(ATAG_PSTORE);
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if (t) {
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gd->pstore_addr = t->u.pstore.buf[LOG_UBOOT].addr;
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gd->pstore_size = t->u.pstore.buf[LOG_UBOOT].size - sizeof(struct persistent_ram_buffer);
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}
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#elif (CONFIG_PERSISTENT_RAM_ADDR == 0 || CONFIG_PERSISTENT_RAM_SIZE == 0)
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#error: CONFIG_PERSISTENT_RAM_SIZE and CONFIG_PERSISTENT_RAM_ADDR value should not be 0.
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#else
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gd->pstore_addr = CONFIG_PERSISTENT_RAM_ADDR;
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gd->pstore_size = CONFIG_PERSISTENT_RAM_SIZE - sizeof(struct persistent_ram_buffer);
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#endif
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if (gd->pstore_addr) {
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rb = (struct persistent_ram_buffer *)gd->pstore_addr;
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pstore_size = gd->pstore_size;
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if (rb->sig != PERSISTENT_RAM_SIG) {
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rb->sig = PERSISTENT_RAM_SIG;
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rb->start = 0x0;
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rb->size = 0x0;
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}
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if (rb->size > pstore_size)
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rb->size = pstore_size;
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if (rb->start >= pstore_size)
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rb->start = 0;
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}
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return 0;
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}
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void putc_to_ram(const char c)
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{
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struct persistent_ram_buffer *rb = (struct persistent_ram_buffer *)gd->pstore_addr;
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u32 pstore_size = gd->pstore_size;
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u8 *dst;
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if (!rb || pstore_size == 0)
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return;
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dst = rb->data + rb->start;
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*dst = c;
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if (rb->size < pstore_size)
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rb->size++;
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rb->start++;
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if (rb->start >= pstore_size)
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rb->start = 0;
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}
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void puts_to_ram(const char *str)
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{
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while (*str) {
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putc_to_ram(*str++);
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}
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}
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