/*
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* (C) Copyright 2010,2011
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* NVIDIA Corporation <www.nvidia.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _TEGRA20_H_
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#define _TEGRA20_H_
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#define NV_PA_SDRAM_BASE 0x00000000
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#define NV_PA_MC_BASE 0x7000F000
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#include <asm/arch-tegra/tegra.h>
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#define TEGRA_USB1_BASE 0xC5000000
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#define BCT_ODMDATA_OFFSET 4068 /* 12 bytes from end of BCT */
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#define MAX_NUM_CPU 2
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#endif /* TEGRA20_H */
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