/*
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* (C) Copyright 2014
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* Chen-Yu Tsai <wens@csie.org>
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*
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* Watchdog register definitions
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SUNXI_WATCHDOG_H_
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#define _SUNXI_WATCHDOG_H_
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#define WDT_CTRL_RESTART (0x1 << 0)
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#define WDT_CTRL_KEY (0x0a57 << 1)
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#if defined(CONFIG_MACH_SUN4I) || \
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defined(CONFIG_MACH_SUN5I) || \
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defined(CONFIG_MACH_SUN7I) || \
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defined(CONFIG_MACH_SUN8I_R40)
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#define WDT_MODE_EN (0x1 << 0)
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#define WDT_MODE_RESET_EN (0x1 << 1)
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struct sunxi_wdog {
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u32 ctl; /* 0x00 */
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u32 mode; /* 0x04 */
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u32 res[2];
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};
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#else
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#define WDT_CFG_RESET (0x1)
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#define WDT_MODE_EN (0x1)
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struct sunxi_wdog {
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u32 irq_en; /* 0x00 */
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u32 irq_sta; /* 0x04 */
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u32 res1[2];
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u32 ctl; /* 0x10 */
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u32 cfg; /* 0x14 */
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u32 mode; /* 0x18 */
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u32 res2;
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};
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#endif
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#endif /* _SUNXI_WATCHDOG_H_ */
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