/*
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* (C) Copyright 2016 Google, Inc
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* (C) Copyright 2008-2014 Rockchip Electronics
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _ASM_ARCH_PWM_H
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#define _ASM_ARCH_PWM_H
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struct rockchip_pwm_regs {
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unsigned long duty;
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unsigned long period;
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unsigned long cntr;
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unsigned long ctrl;
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};
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#define PWM_CTRL_TIMER_EN (1 << 0)
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#define PWM_CTRL_OUTPUT_EN (1 << 3)
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#define RK_PWM_DISABLE (0 << 0)
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#define RK_PWM_ENABLE (1 << 0)
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#define PWM_ONE_SHOT (0 << 1)
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#define PWM_CONTINUOUS (1 << 1)
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#define RK_PWM_CAPTURE (1 << 2)
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#define PWM_DUTY_POSTIVE (1 << 3)
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#define PWM_DUTY_NEGATIVE (0 << 3)
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#define PWM_DUTY_MASK (1 << 3)
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#define PWM_INACTIVE_POSTIVE (1 << 4)
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#define PWM_INACTIVE_NEGATIVE (0 << 4)
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#define PWM_INACTIVE_MASK (1 << 4)
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#define PWM_OUTPUT_LEFT (0 << 5)
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#define PWM_OUTPUT_CENTER (1 << 5)
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#define PWM_LOCK (1 << 6)
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#define PWM_UNLOCK (0 << 6)
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#define PWM_LP_ENABLE (1 << 8)
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#define PWM_LP_DISABLE (0 << 8)
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#define PWM_SEL_SCALE_CLK (1 << 9)
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#define PWM_SEL_SRC_CLK (0 << 9)
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#endif
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