/*
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* (C) Copyright 2017 Heiko Stuebner <heiko@sntech.de>
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* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef _ASM_ARCH_BOOTROM_H
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#define _ASM_ARCH_BOOTROM_H
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/*
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* Saved Stack pointer address.
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* Access might be needed in some special cases.
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*/
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extern u32 SAVE_SP_ADDR;
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/**
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* back_to_bootrom() - return to bootrom (for TPL/SPL), passing a
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* result code
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*
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* Transfer control back to the Rockchip BROM, restoring necessary
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* register context and passing a command/result code to the BROM
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* to instruct its next actions (e.g. continue boot sequence, enter
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* download mode, ...).
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*
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* This function does not return.
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*
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* @brom_cmd: indicates how the bootrom should continue the boot
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* sequence (e.g. load the next stage)
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*/
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enum rockchip_bootrom_cmd {
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/*
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* These can not start at 0, as 0 has a special meaning
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* for setjmp().
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*/
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BROM_BOOT_NEXTSTAGE = 1, /* continue boot-sequence */
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BROM_BOOT_ENTER_DNL, /* have BROM enter download-mode */
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};
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void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd);
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/**
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* Boot-device identifiers as used by the BROM
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*/
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enum {
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BROM_BOOTSOURCE_UNKNOWN = 0,
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BROM_BOOTSOURCE_NAND = 1,
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BROM_BOOTSOURCE_EMMC = 2,
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BROM_BOOTSOURCE_SPINOR = 3,
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BROM_BOOTSOURCE_SPINAND = 4,
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BROM_BOOTSOURCE_SD = 5,
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BROM_BOOTSOURCE_I2C = 8,
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BROM_BOOTSOURCE_SPI = 9,
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BROM_BOOTSOURCE_USB = 10,
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BROM_LAST_BOOTSOURCE = BROM_BOOTSOURCE_USB
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};
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extern const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1];
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/**
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* Locations of the boot-device identifier in SRAM
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*/
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#define BROM_BOOTSOURCE_ID_ADDR (CONFIG_ROCKCHIP_IRAM_START_ADDR + 0x10)
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#endif
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