hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
/*
 * clk-synthesizer.h
 *
 * Clock synthesizer header
 *
 * Copyright (C) 2016, Texas Instruments, Incorporated - http://www.ti.com/
 *
 * SPDX-License-Identifier:    GPL-2.0+
 */
 
#ifndef __CLK_SYNTHESIZER_H
#define __CLK_SYNTHESIZER_H
 
#include <common.h>
 
#define CLK_SYNTHESIZER_ID_REG        0x0
#define CLK_SYNTHESIZER_XCSEL        0x05
#define CLK_SYNTHESIZER_MUX_REG        0x14
#define CLK_SYNTHESIZER_PDIV2_REG    0x16
#define CLK_SYNTHESIZER_PDIV3_REG    0x17
 
#define CLK_SYNTHESIZER_BYTE_MODE    0x80
 
/**
 * struct clk_synth: This structure holds data neeed for configuring
 *             for clock synthesizer.
 * @id: The id of synthesizer
 * @capacitor: value of the capacitor attached
 * @mux: mux settings.
 * @pdiv2: Div to be applied to second output
 * @pdiv3: Div to be applied to third output
 */
struct clk_synth {
   u32 id;
   u32 capacitor;
   u32 mux;
   u32 pdiv2;
   u32 pdiv3;
};
 
int setup_clock_synthesizer(struct clk_synth *data);
 
#endif