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ëlýÿT Õ?Õß?ÕÀ_ÖÇ Â+*KvÕç kªÿÿT)ëJÿÿTòÿÿÇ Â+*K~Õç kªÿÿT)ëJÿÿTêÿÿÇ Â+*KzÕç kªÿÿT)ëJÿÿTâÿÿ) 9ÕC Òj ÑÆÿÿ) 9Õ Òj ÑÂÿÿ @ò T`ÒP Ò^ÿÿ C Ë@ ñk T |¨üÿÿ ë` T 8ýÿÿÀ_Ö¡ Ò >Õ ! Õß?Õ?ÕÀ_Ö¡ ÒùÿÿÀ_Ö Õÿÿÿ v1.3(debug):dd89e9a4b Built : 11:50:53, Jan 13 2021 gicv2_acknowledge_interrupt gicv2_distif_init drivers/arm/gic/v2/gicv2_main.c plat_driver_data plat_driver_data->gicd_base plat_driver_data->gicc_base plat_driver_data->g0_interrupt_array plat_driver_data->g0_interrupt_array ? plat_driver_data->g0_interrupt_num : plat_driver_data->g0_interrupt_num == 0 gic_version == ARCH_REV_GICV2 INFO: ARM GICv2 driver initialized
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gicv2_cpuif_enable gicv2_end_of_interrupt gicv2_is_fiq_enabled gicv2_pcpu_distif_init gicv2_cpuif_disable gicv2_driver_init gicv2_get_pending_interrupt_type gicv2_secure_spis_configure num_ints ? (uintptr_t)sec_intr_list : 1 drivers/arm/gic/v2/gicv2_helpers.c gicv2_secure_ppi_sgi_setup plat_interrupt_type_to_line type == INTR_TYPE_S_EL1 || type == INTR_TYPE_EL3 || type == INTR_TYPE_NS plat/common/plat_gicv2.c plat_rockchip_gic_send_sgi_except_self irq < 16 plat/rockchip/common/rockchip_gicv2.c cci_enable_snoop_dvm_reqs cci_disable_snoop_dvm_reqs map drivers/arm/cci/cci.c Slave interface ID is invalid
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Multiple masters are assigned same slave interface ID
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No master is assigned a valid slave interface
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validate_cci_map(map) g_cci_base master_id <= g_max_master_id (slave_if_id < CCI_SLAVE_INTERFACE_COUNT) && (slave_if_id >= 0) cci_init udelay timer_init ops != 0 && (ops->clk_mult != 0) && (ops->clk_div != 0) && (ops->get_timer_value != 0) drivers/delay_timer/delay_timer.c usec < UINT32_MAX / ops->clk_div ops_ptr != 0 && (ops_ptr->clk_mult != 0) && (ops_ptr->clk_div != 0) && (ops_ptr->get_timer_value != 0) bl31_early_platform_setup INFO: Preloader serial: %d
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from_bl2 plat/rockchip/common/bl31_plat_setup.c from_bl2->h.type == PARAM_BL31 from_bl2->h.version >= VERSION_1 INFO: Tag is overflow
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INFO: Magic(%x) is not support
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0 <
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Ë INFO: powerkey store buffer overflow
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$ERROR: exceed support suspend gpio number
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ERROR: not expected type found %ld
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rockchip_validate_power_state req_state plat/rockchip/common/plat_pm.c cpu_state == PLAT_MAX_RET_STATE RK_CORE_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE rockchip_sec_entrypoint rockchip_cpu_standby rockchip_pwr_domain_off ä @ \ ô À ¨ H 4 rockchip_pwr_domain_on_finish 5 U b f i x } uartdbg_oshdl_to_os_smc_handler uartdbg_init_smc_handler gic_handle_ipi handle == cm_get_context(NON_SECURE) plat/rockchip/common/rockchip_exceptions.c handle_ctx == cm_get_context(NON_SECURE) ERROR: uartdbg_el_data.org_cpu_context err
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ERROR: fiq_dbg_ctx error
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INFO: Using opteed sec cpu_context!
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INFO: boot cpu mask: %d
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ERROR: register secure fiq handler fail: %d
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ERROR: get uartdbg share memory fail: %d
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share_mem_type2page_size(SHARE_PAGE_TYPE_UARTDBG) >= (PLATFORM_CORE_COUNT * (sizeof(cpu_context_t))) uartdbg_to_oshdl_handler ERROR: %s not implement by platform! panic
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ERROR: %s:The cpu_stop_st is error! %d:%x
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!(save_sp & 0xf) plat/rockchip/common/drivers/fiq/fiq_dfs.c fiq_cpu_stop_handler fiq_dfs_wait_cpus_wfe
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âÇoè>1æ· ît{rddr_post_set_rate ERROR: %s: unhandled SMC (0x%lx)
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ERROR: %s: unhandled SMC
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ERROR: %s: unhandled SMC (0x%x)
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INFO: default ddr_dfs_init()
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INFO: default ddr_set_rate()
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INFO: default %s
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INFO: default ddr_round_rate()
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INFO: default ddr_get_rate()
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INFO: default ddr_get_version()
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INFO: default ddr_set_auto_self_refresh()
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INFO: default ddr_plat_smc_handler()
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ERROR: %s: unhandled DDR SMC id(0x%lx)
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rockchip_sip_svc ddr_plat_smc_handler last_log_request rockchip_plat_sip_handler ? $8(,04 """ ( ( mcu_suspend suspend_mode_handler @ L" ¥ J! ERROR: %s:pll_id%d
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ERROR: 0x%x = 0x%x
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WARNING: unlock-pll:%d
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WARNING: %s: %d, %d, %d, error!
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WARNING: %s: %d, %d, error!
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INFO: RK3368 the wake up information:
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INFO: wake up status: 0x%x
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INFO: SIM interrupt wakeup
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INFO: CLUSTER B interrupt wakeup
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INFO: CLUSTER L interrupt wakeup
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INFO: TIMER interrupt wakeup
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INFO: USBDEV detect wakeup
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INFO: GPIO interrupt wakeup
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INFO: GPIO0: 0x%x
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INFO: SDIO interrupt wakeup
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INFO: SDMMC interrupt wakeup
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INFO: MCU wdt interrupt wakeup
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INFO: timer out interrupt wakeup
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INFO: M0 software interrupt wakeup
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INFO: sleep exit
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WARNING: %s:reg %x, wait
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ERROR: %s: Unsupported the idle request
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WARNING: %s:st=%x(%x)
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cpuon_id < PLATFORM_CORE_COUNT plat/rockchip/rk3368/drivers/pmu/pmu.c cpuson_flags[cpuon_id] == 0 WARNING: %s waitting: mcu wfi
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GPIO%d_INTEN: 0x%x
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INFO: BL31: %s
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INFO: enter: cfg=0x%x, sleeptimes:%d
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INFO: sleep from uboot
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INFO: armpd
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INFO: armoff
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INFO: armoff_logpd
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INFO: armoff_logoff
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INFO: slp_sft_32k_ext
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INFO: slp_sft_32k_int
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INFO: pmu_pmualive_32k
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INFO: pmu_pll_pwrdn
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INFO: sft_pll_deep
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INFO: pmu_dis_osc
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INFO: slp_sft_pd_nbscus
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INFO: slp_sft_pd_peri
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INFO: %s:pvtm:
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con0=0x%x, con1=0x%x
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st0=0x%x, st1=0x%x
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freq: %dkhz
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ERROR: %s: not all cpus is off
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ERROR: %s:wait cluster-b l2(%x)
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INFO: ddr flag: 0x%x
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INFO: (%x %x %x %x)
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INFO: stable=%d, wakeuprst=%d, osccnt=%d
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ddrio=%d, pllrst=%d, plllock=%d
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irq[%d]: 0x%x
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IRQ: %d gpio%d_%s%d INFO: gpio int =%x
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(uint64_t)(sram_dst + ddr_get_resume_data_size() / 4) < PSRAM_SP_BOTTOM WARNING: %s: dis osc condition is not enough
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INFO: virtual_poweroff_en: %d
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ERROR: %s: unhandled sip (0x%lx)
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INFO: %s(%d): pd status %x
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b plat_rockchip_pmu_init rk3368_flash_l2_b plat_rockchip_pmusram_prepare pmu_power_domain_ctr check_sleep_config rockchip_soc_cores_pwr_dm_on check_cpu_wfie uÿ xÿ yÿ zÿrk3368_pmu_bus_idle plls_resume_check_reg pmu_scu_b_pwrdn ÿÿ ÿÿ ð à ÿÿ ÿÿ ÿÿ ÿÿ ÿÿ ßÿ ÿÿ ÿÿ ÿÿ w ? ? ÿÿ pll_sleep_32k_pvtm_config uÿ xÿ yÿ zÿNOTICE: BL31:Rockchip release version: v%d.%d
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ÿ ÿ ÿ rÿ rÿ
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ð à à ERROR: read efuse_256 failed!!!!
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svc_mask == PSCI_FID_MASK bl31/bl31_main.c sec_state_is_valid(security_state) secure normal ERROR: EL1 supports AArch64-only. Please set build flag CTX_INCLUDE_AARCH32_REGS = 0 next_image_info image_type == GET_SECURITY_STATE(next_image_info->h.attr) INFO: BL31: Preparing for EL3 exit to %s world
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NOTICE: BL31: %s
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INFO: BL31: Initializing runtime services
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INFO: BL31: Initializing BL32
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get_arm_std_svc_args bl31_prepare_next_image_entry get_scr_el3_from_routing_model bl31/interrupt_mgmt.c intr_type_descs[type].handler cm_get_context_by_index cm_set_context_by_index cm_set_context security_state <= NON_SECURE bl31/bl31_context_mgmt.c cm_get_context handle common/runtime_svc.c idx >= 0 && idx < MAX_RT_SVCS (RT_SVC_DESCS_END >= RT_SVC_DESCS_START) && (RT_SVC_DECS_NUM < MAX_RT_SVCS) ERROR: Error initializing runtime service %s
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ERROR: Invalid runtime service descriptor %p
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runtime_svc_init std_svc_setup WARNING: Unimplemented Standard Service Call: 0x%x
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svc_arg services/std_svc/std_svc_setup.c std_svc [cøèG®-ÀûVAöâcm_el1_sysregs_context_save cm_set_next_context cm_set_elr_el3 lib/el3_runtime/aarch64/context_mgmt.c sp_mode == MODE_SP_EL0 include/lib/el3_runtime/context_mgmt.h (1 << bit_pos) & SCR_VALID_BIT_MASK value <= 1 cm_write_scr_el3_bit cm_init_context_common cm_set_next_eret_context cm_el1_sysregs_context_restore cm_prepare_el3_exit psci_plat_pm_ops->pwr_domain_off lib/psci/psci_off.c psci_do_cpu_off psci_cpu_on_finish (int) target_idx >= 0 lib/psci/psci_on.c ep != NULL psci_plat_pm_ops->pwr_domain_on && psci_plat_pm_ops->pwr_domain_on_finish target_aff_state == AFF_STATE_OFF psci_get_aff_info_state_by_idx(target_idx) == AFF_STATE_ON_PENDING rc == PSCI_E_SUCCESS || rc == PSCI_E_INTERN_FAIL psci_get_aff_info_state() == AFF_STATE_ON_PENDING cpu_on_validate_state psci_cpu_on_start psci_cpu_suspend_start psci_plat_pm_ops->pwr_domain_suspend && psci_plat_pm_ops->pwr_domain_suspend_finish lib/psci/psci_suspend.c psci_get_aff_info_state() == AFF_STATE_ON && is_local_state_off( state_info->pwr_domain_state[PSCI_CPU_PWR_LVL]) max_off_lvl != PSCI_INVALID_PWR_LVL psci_cpu_suspend_finish psci_spd_migrate_info psci_query_sys_suspend_pwrstate psci_is_last_on_cpu psci_register_spd_pm_hook pwrlvl > PSCI_CPU_PWR_LVL lib/psci/psci_common.c psci_plat_pm_ops->validate_power_state psci_plat_pm_ops->get_sys_suspend_power_state psci_get_aff_info_state() == AFF_STATE_ON end_pwrlvl <= PLAT_MAX_PWR_LVL ERROR: Unexpected affinity info state pm rc == PSCI_TOS_UP_MIG_CAP || rc == PSCI_TOS_NOT_UP_MIG_CAP || rc == PSCI_TOS_NOT_PRESENT_MP || rc == PSCI_E_NOT_SUPPORTED INFO: PSCI Power Domain Map:
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INFO: Domain Node : Level %u, parent_node %d, State %s (0x%x)
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INFO: CPU Node : MPID 0x%llx, parent_node %d, State %s (0x%x)
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RETENTION psci_do_state_coordination psci_set_req_local_pwr_state t0 m0 ¢9 psci_validate_power_state ' !! í
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psci_cpu_off psci_migrate lib/psci/psci_main.c psci_validate_suspend_req(&state_info, is_power_down_state) == PSCI_E_SUCCESS ERROR: Invalid target power level for suspend operation
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psci_find_target_suspend_lvl(&state_info) == PLAT_MAX_PWR_LVL psci_validate_suspend_req(&state_info, PSTATE_TYPE_POWERDOWN) == PSCI_E_SUCCESS is_local_state_off(state_info.pwr_domain_state[PLAT_MAX_PWR_LVL]) rc == PSCI_E_DENIED psci_spd_pm && psci_spd_pm->svc_migrate psci_plat_pm_ops->get_node_hw_state (rc >= HW_ON && rc <= HW_STANDBY) || rc == PSCI_E_NOT_SUPPORTED || rc == PSCI_E_INVALID_PARAMS WARNING: Unimplemented PSCI Call: 0x%x
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psci_node_hw_state psci_cpu_suspend psci_system_suspend populate_power_domain_tree psci_setup VERIFY_PSCI_LIB_ARGS_V1(lib_args) lib/psci/psci_setup.c parent_node_index <= PSCI_NUM_NON_CPU_PWR_DOMAINS j == PLATFORM_CORE_COUNT psci_plat_pm_ops GET_SECURITY_STATE(next_image_info->h.attr) == NON_SECURE psci_plat_pm_ops->system_off lib/psci/psci_system_off.c psci_plat_pm_ops->system_reset psci_system_off psci_system_reset bakery_get_ticket bakery_lock_get bakery lib/locks/bakery/bakery_lock_coherent.c me < BAKERY_LOCK_MAX_CPUS !bakery_ticket_number(bakery->lock_data[me]) bakery_lock_release optee_ctx services/spd/opteed/opteed_common.c optee_entry_point pc optee_ctx != NULL optee_ctx->c_rt_ctx == 0 cm_get_context(SECURE) == &optee_ctx->cpu_ctx optee_ctx->c_rt_ctx != 0 opteed_init_optee_ep_state opteed_synchronous_sp_entry opteed_synchronous_sp_exit 1 WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
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services/spd/opteed/opteed_main.c &optee_ctx->cpu_ctx == cm_get_context(SECURE) optee_vectors == NULL handle == cm_get_context(SECURE) ns_cpu_context rc != 0 opteed_std opteed_fast opteed_init opteed_smc_handler opteed_cpu_off_handler opteed_cpu_suspend_handler optee_vectors services/spd/opteed/opteed_pm.c get_optee_pstate(optee_ctx->state) == OPTEE_PSTATE_ON get_optee_pstate(optee_ctx->state) == OPTEE_PSTATE_SUSPEND get_optee_pstate(optee_ctx->state) == OPTEE_PSTATE_OFF opteed_cpu_on_finish_handler opteed_cpu_suspend_finish_handler ( Ä t T , Ä 4 opteed_system_off opteed_system_reset free_base != NULL common/bl_common.c free_size != NULL is_mem_free(*free_base, *free_size, addr, size) WARNING: Nothing to allocate, requested size is zero
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mem_start <= submem_start submem_start <= submem_end submem_end <= mem_end WARNING: Failed to obtain reference to image id=%u (%i)
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WARNING: Failed to access image id=%u (%i)
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WARNING: Failed to determine the size of the image id=%u (%i)
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mem_layout != NULL image_data != NULL image_data->h.version == VERSION_1 INFO: Loading image id=%u at address %p
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WARNING: Failed to reserve region [base = %p, size = 0x%zx]
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INFO: Trying to load image at address %p, size = 0x%zx
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INFO: Current memory layout:
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INFO: total region = [base = %p, size = 0x%zx]
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INFO: free region = [base = %p, size = 0x%zx]
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WARNING: Failed to load image id=%u (%i)
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INFO: Skip reserving region [base = %p, size = 0x%zx]
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INFO: Image id=%u loaded at address %p, size = 0x%zx
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INFO: Entry point address = %p
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INFO: SPSR = 0x%x
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str common/tf_printf.c 0x tf_string_print ASSERT: %s <%d> : %s
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mmap_add_region level >= XLAT_TABLE_LEVEL_MIN && level <= XLAT_TABLE_LEVEL_MAX lib/xlat_tables/xlat_tables_common.c mem_type == MT_NON_CACHEABLE next_xlat <= MAX_XLAT_TABLES IS_PAGE_ALIGNED(base_pa) IS_PAGE_ALIGNED(base_va) IS_PAGE_ALIGNED(size) base_pa < end_pa base_va < end_va (mm->base_va - mm->base_pa) == (base_va - base_pa) (base_va != mm->base_va) || (size != mm->size) separated_va && separated_pa mm_last->size == 0 mmap_desc init_xlation_table_inner enable_mmu_el3 (max_addr & ADDR_MASK_48_TO_63) == 0 lib/xlat_tables/aarch64/xlat_tables.c max_va < ADDR_SPACE_SIZE IS_IN_EL(1) (read_sctlr_el1() & SCTLR_M_BIT) == 0 IS_IN_EL(3) (read_sctlr_el3() & SCTLR_M_BIT) == 0 calc_physical_addr_size_bits init_xlat_tables ncpu plat/common/plat_psci_common.c plat_get_target_pwr_state cpuectlr_el1 cpumerrsr_el1 l2merrsr_el1 gicc_hppir gicc_ahppir gicc_ctlr icc_hppir0_el1 icc_hppir1_el1 icc_ctlr_el3 gicd_ispendr regs (Offsets 0x200 - 0x278)
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Offset: value
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: 0x cci_snoop_ctrl_cluster0 cci_snoop_ctrl_cluster1 = 0x x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 x10 x11 x12 x13 x14 x15 x16 x17 x18 x19 x20 x21 x22 x23 x24 x25 x26 x27 x28 x29 scr_el3 sctlr_el3 cptr_el3 tcr_el3 daif mair_el3 spsr_el3 elr_el3 ttbr0_el3 esr_el3 far_el3 spsr_el1 elr_el1 spsr_abt spsr_und spsr_irq spsr_fiq sctlr_el1 actlr_el1 cpacr_el1 csselr_el1 sp_el1 esr_el1 ttbr0_el1 ttbr1_el1 mair_el1 amair_el1 tcr_el1 tpidr_el1 tpidr_el0 tpidrro_el0 dacr32_el2 ifsr32_el2 par_el1 mpidr_el1 afsr0_el1 afsr1_el1 contextidr_el1 vbar_el1 cntp_ctl_el0 cntp_cval_el0 cntv_ctl_el0 cntv_cval_el0 cntkctl_el1 fpexc32_el2 sp_el0 isr_el1 PANIC in EL3 at x30 = 0x Unhandled Exception in EL3.
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x30 = 0x Unhandled Interrupt Exception in EL3.
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x30 = 0x lib/cpus/aarch64/cpu_helpers.S ASSERT: File Line PANIC at PC : 0x lib/aarch64/misc_helpers.S ; ) N) Èv v 2? T8 8 2? _8 ¸ 8 0ÐA `¯ ¯ ¤¯ ȯ }îÿ gîÿ Gîÿ îÿ ýíÿ çíÿ Çíÿ íÿ ÿDÕþ{ ù R>ÕÞZÓßO ñ ¥ýTß_ ñ¥ýTuíÿ ÿDÕþ{ ùÐîÿ @>Õ!@>Õà©â@ùô ¿@ Õ_ oÿ ñ@ Tªÿ ´õ ªà@²>ÕA @Óâªã ª ?Öãîÿ ÿDÕþ{ ù°îÿ @>Õ!@>Õà©â@ùô ¿@ Õ_ ãnÿ ñ@ Tÿ ´õ ªà@²>ÕA @Óâªã ª ?ÖÃîÿ íÿ ÿDÕþ{ ù R>ÕÞZÓßO ñ ýTß_ ñýTõìÿ ÿDÕþ{ ùPîÿ @>Õ!@>Õà©â@ùô ¿@ Õ_ nÿ ñ@ T*ÿ ´õ ªà@²>ÕA @Óâªã ª ?Öcîÿ ÿDÕþ{ ù0îÿ @>Õ!@>Õà©â@ùô ¿@ Õ_ cnÿ ñ@ T
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@¹` 4"\Aùý{¿©àªáª ?Öý{Á¨ó @ù Rý{¨ ÿÿó @ùý{¨À_Ö .shstrtab .text_sram .data_sram ro .data stacks .bss xlat_table coherent_ram ÿ ÿ ! P $ P P H * X HX @ @ 1 HX 0H @ 6 ð HX A HX N
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