// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* ALSA SoC Audio Layer - Rockchip Multi-DAIS-PCM driver
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*
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* Copyright (c) 2018 Rockchip Electronics Co. Ltd.
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* Author: Sugar Zhang <sugar.zhang@rock-chips.com>
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*
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*/
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#include <linux/module.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include "rockchip_multi_dais.h"
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#include "rockchip_dlp.h"
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#define I2S_TXFIFOLR 0xc
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#define I2S_RXFIFOLR 0x2c
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#define SAI_TXFIFOLR 0x1c
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#define SAI_RXFIFOLR 0x20
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/* XFL4 is compatible for old version */
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#define I2S_FIFOLR_XFL4(v) (((v) & GENMASK(29, 24)) >> 24)
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#define I2S_FIFOLR_XFL3(v) (((v) & GENMASK(23, 18)) >> 18)
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#define I2S_FIFOLR_XFL2(v) (((v) & GENMASK(17, 12)) >> 12)
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#define I2S_FIFOLR_XFL1(v) (((v) & GENMASK(11, 6)) >> 6)
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#define I2S_FIFOLR_XFL0(v) (((v) & GENMASK(5, 0)) >> 0)
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/* XFIFOLR: Transfer / Receive FIFO Level Register */
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#define SAI_FIFOLR_XFL3(v) (((v) & GENMASK(23, 18)) >> 18)
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#define SAI_FIFOLR_XFL2(v) (((v) & GENMASK(17, 12)) >> 12)
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#define SAI_FIFOLR_XFL1(v) (((v) & GENMASK(11, 6)) >> 6)
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#define SAI_FIFOLR_XFL0(v) (((v) & GENMASK(5, 0)) >> 0)
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#define MAX_FIFO_SIZE 32 /* max fifo size in frames */
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#define SND_DMAENGINE_MPCM_DRV_NAME "snd_dmaengine_mpcm"
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static unsigned int prealloc_buffer_size_kbytes = 512;
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module_param(prealloc_buffer_size_kbytes, uint, 0444);
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MODULE_PARM_DESC(prealloc_buffer_size_kbytes, "Preallocate DMA buffer size (KB).");
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struct dmaengine_mpcm {
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struct dlp dlp;
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struct rk_mdais_dev *mdais;
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struct dma_chan *tx_chans[MAX_DAIS];
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struct dma_chan *rx_chans[MAX_DAIS];
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};
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struct dmaengine_mpcm_runtime_data {
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struct dlp_runtime_data drd;
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struct dma_chan *chans[MAX_DAIS];
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struct dma_interleaved_template *xt;
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dma_cookie_t cookies[MAX_DAIS];
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unsigned int *channel_maps;
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int num_chans;
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unsigned int pos;
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unsigned int master_chan;
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bool start_flag;
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#ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
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unsigned int vpos;
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unsigned int vresidue_bytes;
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#endif
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};
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static inline struct dmaengine_mpcm_runtime_data *substream_to_prtd(
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const struct snd_pcm_substream *substream)
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{
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struct dlp_runtime_data *drd = substream_to_drd(substream);
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if (!drd)
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return NULL;
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return container_of(drd, struct dmaengine_mpcm_runtime_data, drd);
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}
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static struct dmaengine_mpcm *soc_component_to_mpcm(struct snd_soc_component *p)
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{
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return container_of(soc_component_to_dlp(p), struct dmaengine_mpcm, dlp);
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}
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static struct dma_chan *to_chan(struct dmaengine_mpcm *pcm,
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struct snd_pcm_substream *substream)
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{
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struct dma_chan *chan = NULL;
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int i;
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for (i = 0; i < pcm->mdais->num_dais; i++) {
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chan = substream->stream ? pcm->rx_chans[i] : pcm->tx_chans[i];
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if (chan)
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break;
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}
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return chan;
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}
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static struct device *dmaengine_dma_dev(struct dmaengine_mpcm *pcm,
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struct snd_pcm_substream *substream)
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{
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struct dma_chan *chan;
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chan = to_chan(pcm, substream);
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if (!chan)
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return NULL;
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return chan->device->dev;
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}
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static void snd_dmaengine_mpcm_set_config_from_dai_data(
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const struct snd_pcm_substream *substream,
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const struct snd_dmaengine_dai_dma_data *dma_data,
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struct dma_slave_config *slave_config)
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{
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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slave_config->dst_addr = dma_data->addr;
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if (dma_data->addr_width != DMA_SLAVE_BUSWIDTH_UNDEFINED)
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slave_config->dst_addr_width = dma_data->addr_width;
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} else {
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slave_config->src_addr = dma_data->addr;
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if (dma_data->addr_width != DMA_SLAVE_BUSWIDTH_UNDEFINED)
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slave_config->src_addr_width = dma_data->addr_width;
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}
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slave_config->slave_id = dma_data->slave_id;
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}
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static void dmaengine_mpcm_dma_complete(void *arg)
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{
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struct snd_pcm_substream *substream = arg;
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#ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
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struct dmaengine_mpcm_runtime_data *prtd;
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#endif
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struct dlp_runtime_data *drd;
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struct dlp *dlp;
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snd_pcm_stream_lock_irq(substream);
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if (!substream->runtime) {
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snd_pcm_stream_unlock_irq(substream);
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return;
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}
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#ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
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prtd = substream_to_prtd(substream);
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if (unlikely(!prtd))
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return;
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if (snd_pcm_vad_attached(substream) &&
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substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
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void *buf = substream->runtime->dma_area + prtd->pos;
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snd_pcm_vad_preprocess(substream, buf,
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substream->runtime->period_size);
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}
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prtd->pos += snd_pcm_lib_period_bytes(substream);
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if (prtd->pos >= snd_pcm_lib_buffer_bytes(substream))
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prtd->pos = 0;
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#endif
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drd = substream_to_drd(substream);
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dlp = drd->parent;
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dlp_dma_complete(dlp, drd);
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snd_pcm_stream_unlock_irq(substream);
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snd_pcm_period_elapsed(substream);
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}
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static void dmaengine_mpcm_get_master_chan(struct dmaengine_mpcm_runtime_data *prtd)
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{
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int i;
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if (unlikely(!prtd))
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return;
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for (i = prtd->num_chans; i > 0; i--) {
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if (prtd->chans[i - 1]) {
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prtd->master_chan = i - 1;
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break;
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}
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}
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}
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static int dmaengine_config_interleaved(struct snd_pcm_substream *substream,
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struct dma_interleaved_template *xt,
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int offset, int sample_bytes, int nump, int numf)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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int frame_bytes;
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frame_bytes = frames_to_bytes(runtime, 1);
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xt->frame_size = 1;
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xt->sgl[0].size = sample_bytes;
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xt->sgl[0].icg = frame_bytes - sample_bytes;
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#ifdef CONFIG_NO_GKI
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xt->nump = nump;
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#endif
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xt->numf = numf;
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xt->dir = snd_pcm_substream_to_dma_direction(substream);
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if (xt->dir == DMA_MEM_TO_DEV) {
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xt->src_start = runtime->dma_addr + offset;
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xt->src_inc = true;
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xt->src_sgl = true;
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xt->dst_inc = false;
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xt->dst_sgl = false;
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} else {
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xt->dst_start = runtime->dma_addr + offset;
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xt->src_inc = false;
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xt->src_sgl = false;
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xt->dst_inc = true;
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xt->dst_sgl = true;
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}
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return 0;
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}
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static int dmaengine_mpcm_prepare_and_submit(struct snd_pcm_substream *substream)
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{
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struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct dma_async_tx_descriptor *desc = NULL;
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struct dma_interleaved_template *xt;
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unsigned long flags = DMA_CTRL_ACK;
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unsigned int *maps;
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int offset;
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int i;
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if (unlikely(!prtd || !runtime))
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return -EINVAL;
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if (!substream->runtime->no_period_wakeup)
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flags |= DMA_PREP_INTERRUPT;
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prtd->pos = 0;
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offset = 0;
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xt = prtd->xt;
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maps = prtd->channel_maps;
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for (i = 0; i < prtd->num_chans; i++) {
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if (!prtd->chans[i])
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continue;
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dmaengine_config_interleaved(substream, xt, offset,
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samples_to_bytes(runtime, maps[i]),
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runtime->period_size,
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runtime->buffer_size);
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desc = dmaengine_prep_interleaved_dma(prtd->chans[i], xt,
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flags | DMA_PREP_REPEAT);
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if (!desc)
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return -ENOMEM;
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prtd->cookies[i] = dmaengine_submit(desc);
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offset += samples_to_bytes(runtime, maps[i]);
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}
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if (desc) {
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desc->callback = dmaengine_mpcm_dma_complete;
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desc->callback_param = substream;
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dmaengine_mpcm_get_master_chan(prtd);
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} else {
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return -ENOMEM;
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}
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return 0;
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}
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static void mpcm_dma_async_issue_pending(struct dmaengine_mpcm_runtime_data *prtd)
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{
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int i;
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if (unlikely(!prtd))
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return;
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for (i = 0; i < prtd->num_chans; i++) {
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if (prtd->chans[i])
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dma_async_issue_pending(prtd->chans[i]);
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}
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}
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static void mpcm_dmaengine_resume(struct dmaengine_mpcm_runtime_data *prtd)
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{
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int i;
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if (unlikely(!prtd))
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return;
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for (i = 0; i < prtd->num_chans; i++) {
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if (prtd->chans[i])
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dmaengine_resume(prtd->chans[i]);
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}
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}
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static void mpcm_dmaengine_pause(struct dmaengine_mpcm_runtime_data *prtd)
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{
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int i;
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if (unlikely(!prtd))
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return;
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for (i = 0; i < prtd->num_chans; i++) {
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if (prtd->chans[i])
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dmaengine_pause(prtd->chans[i]);
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}
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}
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static void mpcm_dmaengine_terminate_all(struct dmaengine_mpcm_runtime_data *prtd)
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{
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int i;
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if (unlikely(!prtd))
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return;
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for (i = 0; i < prtd->num_chans; i++) {
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if (prtd->chans[i])
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dmaengine_terminate_all(prtd->chans[i]);
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}
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}
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#ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
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static void dmaengine_mpcm_single_dma_complete(void *arg)
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{
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struct snd_pcm_substream *substream = arg;
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struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
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unsigned int pos, size;
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void *buf;
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if (unlikely(!prtd))
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return;
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if (snd_pcm_vad_attached(substream) &&
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substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
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buf = substream->runtime->dma_area + prtd->vpos;
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pos = prtd->vpos + snd_pcm_lib_period_bytes(substream);
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if (pos <= snd_pcm_lib_buffer_bytes(substream))
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size = substream->runtime->period_size;
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else
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size = bytes_to_frames(substream->runtime,
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prtd->vresidue_bytes);
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snd_pcm_vad_preprocess(substream, buf, size);
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}
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prtd->vpos += snd_pcm_lib_period_bytes(substream);
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if (prtd->vpos >= snd_pcm_lib_buffer_bytes(substream))
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prtd->vpos = 0;
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snd_pcm_period_elapsed(substream);
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}
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static int __mpcm_prepare_single_and_submit(struct snd_pcm_substream *substream,
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int buf_offset, int size)
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{
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struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
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struct dma_interleaved_template *xt;
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct dma_async_tx_descriptor *desc;
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unsigned long flags = DMA_CTRL_ACK;
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unsigned int *maps;
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int offset, i;
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bool callback = false;
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if (unlikely(!prtd || !runtime))
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return -EINVAL;
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if (!substream->runtime->no_period_wakeup)
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flags |= DMA_PREP_INTERRUPT;
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offset = buf_offset;
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xt = prtd->xt;
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maps = prtd->channel_maps;
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for (i = 0; i < prtd->num_chans; i++) {
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if (!prtd->chans[i])
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continue;
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dmaengine_config_interleaved(substream, xt, offset,
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samples_to_bytes(runtime, maps[i]),
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0,
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bytes_to_frames(runtime, size));
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desc = dmaengine_prep_interleaved_dma(prtd->chans[i], xt, flags);
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if (!desc)
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return -ENOMEM;
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if (!callback) {
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desc->callback = dmaengine_mpcm_single_dma_complete;
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desc->callback_param = substream;
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callback = true;
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}
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dmaengine_submit(desc);
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offset += samples_to_bytes(runtime, maps[i]);
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}
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return 0;
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}
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static int dmaengine_mpcm_prepare_single_and_submit(struct snd_pcm_substream *substream)
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{
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struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
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enum dma_transfer_direction direction;
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unsigned long flags = DMA_CTRL_ACK;
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snd_pcm_uframes_t avail;
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dma_addr_t buf_start, buf_end;
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int offset, i, count, ret;
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int buffer_bytes, period_bytes, residue_bytes;
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if (unlikely(!prtd))
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return -EINVAL;
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direction = snd_pcm_substream_to_dma_direction(substream);
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if (!substream->runtime->no_period_wakeup)
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flags |= DMA_PREP_INTERRUPT;
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period_bytes = snd_pcm_lib_period_bytes(substream);
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buffer_bytes = snd_pcm_lib_buffer_bytes(substream);
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avail = snd_pcm_vad_avail(substream);
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offset = frames_to_bytes(substream->runtime, avail);
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prtd->vpos = offset;
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buf_start = substream->runtime->dma_addr + offset;
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buf_end = substream->runtime->dma_addr + snd_pcm_lib_buffer_bytes(substream);
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count = (buf_end - buf_start) / period_bytes;
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residue_bytes = (buf_end - buf_start) % period_bytes;
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prtd->vresidue_bytes = residue_bytes;
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pr_debug("%s: offset: %d, buffer_bytes: %d\n", __func__, offset, buffer_bytes);
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pr_debug("%s: count: %d, residue_bytes: %d\n", __func__, count, residue_bytes);
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for (i = 0; i < count; i++) {
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ret = __mpcm_prepare_single_and_submit(substream, offset,
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period_bytes);
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if (ret)
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return ret;
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offset += period_bytes;
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}
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if (residue_bytes) {
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ret = __mpcm_prepare_single_and_submit(substream, offset,
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residue_bytes);
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if (ret)
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return ret;
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}
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return 0;
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}
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#endif
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static snd_pcm_uframes_t dmaengine_mpcm_raw_pointer(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
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struct dma_tx_state state;
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unsigned int buf_size;
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unsigned int pos = 0;
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unsigned int master;
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if (unlikely(!prtd))
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return 0;
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master = prtd->master_chan;
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buf_size = snd_pcm_lib_buffer_bytes(substream);
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dmaengine_tx_status(prtd->chans[master], prtd->cookies[master], &state);
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if (state.residue > 0 && state.residue <= buf_size)
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pos = buf_size - state.residue;
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return bytes_to_frames(substream->runtime, pos);
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}
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static int dmaengine_mpcm_dlp_start(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct dmaengine_mpcm *pcm = soc_component_to_mpcm(component);
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return dlp_start(component, substream, pcm->mdais->dev, dmaengine_mpcm_raw_pointer);
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}
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static void dmaengine_mpcm_dlp_stop(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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dlp_stop(component, substream, dmaengine_mpcm_raw_pointer);
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}
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static int dmaengine_mpcm_trigger(struct snd_soc_component *component,
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struct snd_pcm_substream *substream, int cmd)
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{
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struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
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struct snd_pcm_runtime *runtime = substream->runtime;
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int ret;
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if (unlikely(!prtd || !runtime))
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return -EINVAL;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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#ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE &&
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snd_pcm_vad_attached(substream) &&
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snd_pcm_vad_avail(substream)) {
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dmaengine_mpcm_prepare_single_and_submit(substream);
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mpcm_dma_async_issue_pending(prtd);
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}
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#endif
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ret = dmaengine_mpcm_prepare_and_submit(substream);
|
if (ret)
|
return ret;
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mpcm_dma_async_issue_pending(prtd);
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dmaengine_mpcm_dlp_start(component, substream);
|
break;
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case SNDRV_PCM_TRIGGER_RESUME:
|
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
|
mpcm_dmaengine_resume(prtd);
|
break;
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case SNDRV_PCM_TRIGGER_SUSPEND:
|
if (runtime->info & SNDRV_PCM_INFO_PAUSE) {
|
mpcm_dmaengine_pause(prtd);
|
} else {
|
dmaengine_mpcm_dlp_stop(component, substream);
|
mpcm_dmaengine_terminate_all(prtd);
|
}
|
prtd->start_flag = false;
|
break;
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
|
mpcm_dmaengine_pause(prtd);
|
prtd->start_flag = false;
|
break;
|
case SNDRV_PCM_TRIGGER_STOP:
|
dmaengine_mpcm_dlp_stop(component, substream);
|
mpcm_dmaengine_terminate_all(prtd);
|
prtd->start_flag = false;
|
break;
|
default:
|
return -EINVAL;
|
}
|
|
return 0;
|
}
|
|
static int dmaengine_mpcm_hw_params(struct snd_soc_component *component,
|
struct snd_pcm_substream *substream,
|
struct snd_pcm_hw_params *params)
|
{
|
struct dmaengine_mpcm *pcm = soc_component_to_mpcm(component);
|
struct dma_chan *chan;
|
struct snd_dmaengine_dai_dma_data *dma_data;
|
struct dma_slave_config slave_config;
|
snd_pcm_format_t format;
|
unsigned int *maps;
|
int frame_bytes;
|
int ret, num, i, sz;
|
|
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
|
maps = pcm->mdais->playback_channel_maps;
|
else
|
maps = pcm->mdais->capture_channel_maps;
|
format = params_format(params);
|
frame_bytes = snd_pcm_format_size(format, params_channels(params));
|
num = pcm->mdais->num_dais;
|
|
for (i = 0; i < num; i++) {
|
memset(&slave_config, 0, sizeof(slave_config));
|
ret = snd_hwparams_to_dma_slave_config(substream, params,
|
&slave_config);
|
if (ret)
|
return ret;
|
|
dma_data = snd_soc_dai_get_dma_data(pcm->mdais->dais[i].dai,
|
substream);
|
if (!dma_data)
|
continue;
|
|
snd_dmaengine_mpcm_set_config_from_dai_data(substream,
|
dma_data,
|
&slave_config);
|
|
/* refine params for interlace access */
|
sz = snd_pcm_format_size(format, maps[i]);
|
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
|
chan = pcm->tx_chans[i];
|
if (sz && (frame_bytes - sz) > 0)
|
slave_config.dst_maxburst = sz / slave_config.dst_addr_width;
|
} else {
|
chan = pcm->rx_chans[i];
|
if (sz && (frame_bytes - sz) > 0)
|
slave_config.src_maxburst = sz / slave_config.src_addr_width;
|
}
|
if (!chan)
|
continue;
|
|
ret = dmaengine_slave_config(chan, &slave_config);
|
if (ret)
|
return ret;
|
}
|
|
ret = dlp_hw_params(component, substream, params);
|
if (ret)
|
return ret;
|
|
return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
|
}
|
|
static int dmaengine_mpcm_set_runtime_hwparams(struct snd_pcm_substream *substream)
|
{
|
struct snd_soc_pcm_runtime *rtd = substream->private_data;
|
struct snd_soc_component *component =
|
snd_soc_rtdcom_lookup(rtd, SND_DMAENGINE_MPCM_DRV_NAME);
|
struct dmaengine_mpcm *pcm = soc_component_to_mpcm(component);
|
struct device *dma_dev = dmaengine_dma_dev(pcm, substream);
|
struct dma_chan *chan;
|
struct dma_slave_caps dma_caps;
|
struct snd_pcm_hardware hw;
|
u32 addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
|
BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
|
BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
|
snd_pcm_format_t i;
|
int ret;
|
|
chan = to_chan(pcm, substream);
|
if (!chan || !dma_dev)
|
return -EINVAL;
|
|
memset(&hw, 0, sizeof(hw));
|
hw.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
|
SNDRV_PCM_INFO_INTERLEAVED;
|
hw.periods_min = 2;
|
hw.periods_max = UINT_MAX;
|
hw.period_bytes_min = 256;
|
hw.period_bytes_max = dma_get_max_seg_size(dma_dev);
|
hw.buffer_bytes_max = SIZE_MAX;
|
|
ret = dma_get_slave_caps(chan, &dma_caps);
|
if (ret == 0) {
|
if (dma_caps.cmd_pause && dma_caps.cmd_resume)
|
hw.info |= SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME;
|
if (dma_caps.residue_granularity <= DMA_RESIDUE_GRANULARITY_SEGMENT)
|
hw.info |= SNDRV_PCM_INFO_BATCH;
|
|
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
|
addr_widths = dma_caps.dst_addr_widths;
|
else
|
addr_widths = dma_caps.src_addr_widths;
|
}
|
|
/*
|
* Prepare formats mask for valid/allowed sample types. If the dma does
|
* not have support for the given physical word size, it needs to be
|
* masked out so user space can not use the format which produces
|
* corrupted audio.
|
* In case the dma driver does not implement the slave_caps the default
|
* assumption is that it supports 1, 2 and 4 bytes widths.
|
*/
|
for (i = 0; i <= SNDRV_PCM_FORMAT_LAST; i++) {
|
int bits = snd_pcm_format_physical_width(i);
|
|
/* Enable only samples with DMA supported physical widths */
|
switch (bits) {
|
case 8:
|
case 16:
|
case 24:
|
case 32:
|
case 64:
|
if (addr_widths & (1 << (bits / 8)))
|
hw.formats |= pcm_format_to_bits(i);
|
break;
|
default:
|
/* Unsupported types */
|
break;
|
}
|
}
|
|
return snd_soc_set_runtime_hwparams(substream, &hw);
|
}
|
|
static int dmaengine_mpcm_open(struct snd_soc_component *component,
|
struct snd_pcm_substream *substream)
|
{
|
struct dmaengine_mpcm *pcm = soc_component_to_mpcm(component);
|
struct dmaengine_mpcm_runtime_data *prtd;
|
int ret, i;
|
|
ret = dmaengine_mpcm_set_runtime_hwparams(substream);
|
if (ret)
|
return ret;
|
|
ret = snd_pcm_hw_constraint_integer(substream->runtime,
|
SNDRV_PCM_HW_PARAM_PERIODS);
|
if (ret < 0)
|
return ret;
|
|
prtd = kzalloc(sizeof(*prtd), GFP_KERNEL);
|
if (!prtd)
|
return -ENOMEM;
|
|
prtd->xt = kzalloc(sizeof(struct dma_interleaved_template) +
|
sizeof(struct data_chunk), GFP_KERNEL);
|
if (!prtd->xt) {
|
kfree(prtd);
|
return -ENOMEM;
|
}
|
|
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
|
prtd->channel_maps = pcm->mdais->playback_channel_maps;
|
for (i = 0; i < pcm->mdais->num_dais; i++)
|
prtd->chans[i] = pcm->tx_chans[i];
|
} else {
|
prtd->channel_maps = pcm->mdais->capture_channel_maps;
|
for (i = 0; i < pcm->mdais->num_dais; i++)
|
prtd->chans[i] = pcm->rx_chans[i];
|
}
|
|
prtd->num_chans = pcm->mdais->num_dais;
|
prtd->start_flag = false;
|
|
dlp_open(&pcm->dlp, &prtd->drd, substream);
|
|
return 0;
|
}
|
|
static int dmaengine_mpcm_new(struct snd_soc_component *component, struct snd_soc_pcm_runtime *rtd)
|
{
|
struct dmaengine_mpcm *pcm = soc_component_to_mpcm(component);
|
struct snd_pcm_substream *substream;
|
struct device *dma_dev;
|
size_t prealloc_buffer_size;
|
size_t max_buffer_size;
|
unsigned int i;
|
|
prealloc_buffer_size = prealloc_buffer_size_kbytes * 1024;
|
max_buffer_size = SIZE_MAX;
|
|
for (i = SNDRV_PCM_STREAM_PLAYBACK; i <= SNDRV_PCM_STREAM_CAPTURE; i++) {
|
substream = rtd->pcm->streams[i].substream;
|
if (!substream)
|
continue;
|
|
dma_dev = dmaengine_dma_dev(pcm, substream);
|
if (!dma_dev) {
|
dev_err(component->dev, "No chan found, should assign 'rockchip,no-dmaengine' in DT\n");
|
return -EINVAL;
|
}
|
|
snd_pcm_lib_preallocate_pages(substream,
|
SNDRV_DMA_TYPE_DEV_IRAM,
|
dma_dev,
|
prealloc_buffer_size,
|
max_buffer_size);
|
}
|
|
return 0;
|
}
|
|
static snd_pcm_uframes_t dmaengine_mpcm_pointer(struct snd_soc_component *component,
|
struct snd_pcm_substream *substream)
|
{
|
struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
|
struct snd_pcm_runtime *runtime = substream->runtime;
|
struct dma_tx_state state;
|
snd_pcm_uframes_t frames;
|
unsigned int buf_size;
|
unsigned int pos = 0;
|
unsigned int master;
|
|
if (unlikely(!prtd || !runtime))
|
return 0;
|
|
master = prtd->master_chan;
|
buf_size = snd_pcm_lib_buffer_bytes(substream);
|
dmaengine_tx_status(prtd->chans[master], prtd->cookies[master], &state);
|
if (state.residue > 0 && state.residue <= buf_size)
|
pos = buf_size - state.residue;
|
|
frames = bytes_to_frames(substream->runtime, pos);
|
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
|
return frames;
|
|
#ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
|
if (prtd->vpos)
|
frames = bytes_to_frames(substream->runtime, prtd->vpos);
|
#endif
|
if (!prtd->start_flag && frames >= MAX_FIFO_SIZE)
|
prtd->start_flag = true;
|
|
if (prtd->start_flag) {
|
if (frames >= MAX_FIFO_SIZE)
|
frames -= MAX_FIFO_SIZE;
|
else
|
frames = runtime->buffer_size + frames - MAX_FIFO_SIZE;
|
} else {
|
frames = 0;
|
}
|
|
return frames;
|
}
|
|
static int dmaengine_mpcm_ioctl(struct snd_soc_component *component,
|
struct snd_pcm_substream *substream,
|
unsigned int cmd, void *arg)
|
{
|
return snd_pcm_lib_ioctl(substream, cmd, arg);
|
}
|
|
static int dmaengine_mpcm_hw_free(struct snd_soc_component *component,
|
struct snd_pcm_substream *substream)
|
{
|
return snd_pcm_lib_free_pages(substream);
|
}
|
|
static int dmaengine_mpcm_close(struct snd_soc_component *component,
|
struct snd_pcm_substream *substream)
|
{
|
struct dmaengine_mpcm *pcm = soc_component_to_mpcm(component);
|
struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
|
|
if (unlikely(!prtd))
|
return -EINVAL;
|
|
dlp_close(&pcm->dlp, &prtd->drd, substream);
|
|
kfree(prtd->xt);
|
kfree(prtd);
|
|
return 0;
|
}
|
|
static int dmaengine_mpcm_copy_user(struct snd_soc_component *component,
|
struct snd_pcm_substream *substream,
|
int channel, unsigned long hwoff,
|
void __user *buf, unsigned long bytes)
|
{
|
return dlp_copy_user(component, substream, channel, hwoff, buf, bytes);
|
}
|
|
|
static int dmaengine_mpcm_prepare(struct snd_soc_component *component,
|
struct snd_pcm_substream *substream)
|
{
|
return dlp_prepare(component, substream);
|
}
|
|
static int dmaengine_mpcm_probe(struct snd_soc_component *component)
|
{
|
return dlp_probe(component);
|
}
|
|
static const struct snd_soc_component_driver dmaengine_mpcm_platform = {
|
.name = SND_DMAENGINE_MPCM_DRV_NAME,
|
.probe_order = SND_SOC_COMP_ORDER_LATE,
|
.probe = dmaengine_mpcm_probe,
|
.pcm_construct = dmaengine_mpcm_new,
|
.open = dmaengine_mpcm_open,
|
.close = dmaengine_mpcm_close,
|
.ioctl = dmaengine_mpcm_ioctl,
|
.hw_params = dmaengine_mpcm_hw_params,
|
.hw_free = dmaengine_mpcm_hw_free,
|
.prepare = dmaengine_mpcm_prepare,
|
.trigger = dmaengine_mpcm_trigger,
|
.pointer = dmaengine_mpcm_pointer,
|
.copy_user = dmaengine_mpcm_copy_user,
|
};
|
|
static void dmaengine_mpcm_release_chan(struct dmaengine_mpcm *pcm)
|
{
|
int i;
|
|
for (i = 0; i < pcm->mdais->num_dais; i++) {
|
if (pcm->tx_chans[i])
|
dma_release_channel(pcm->tx_chans[i]);
|
if (pcm->rx_chans[i])
|
dma_release_channel(pcm->rx_chans[i]);
|
}
|
}
|
|
static int dmaengine_mpcm_get_fifo_count(struct device *dev,
|
struct snd_pcm_substream *substream)
|
{
|
struct rk_mdais_dev *mdais = dev_get_drvdata(dev);
|
struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
|
struct snd_soc_component *component;
|
unsigned int tx, rx, reg;
|
int val = 0;
|
|
if (unlikely(!prtd))
|
return -EINVAL;
|
|
component = mdais->dais[prtd->master_chan].dai->component;
|
if (unlikely(!component))
|
return -EINVAL;
|
|
if (strstr(dev_driver_string(component->dev), "i2s")) {
|
/* compatible for both I2S and I2STDM controller */
|
tx = snd_soc_component_read(component, I2S_TXFIFOLR);
|
rx = snd_soc_component_read(component, I2S_RXFIFOLR);
|
|
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
|
val = I2S_FIFOLR_XFL3(tx) +
|
I2S_FIFOLR_XFL2(tx) +
|
I2S_FIFOLR_XFL1(tx) +
|
I2S_FIFOLR_XFL0(tx);
|
else
|
/* XFL4 is compatible for old version */
|
val = I2S_FIFOLR_XFL4(tx) +
|
I2S_FIFOLR_XFL3(rx) +
|
I2S_FIFOLR_XFL2(rx) +
|
I2S_FIFOLR_XFL1(rx) +
|
I2S_FIFOLR_XFL0(rx);
|
} else if (strstr(dev_driver_string(component->dev), "sai")) {
|
reg = substream->stream ? SAI_RXFIFOLR : SAI_TXFIFOLR;
|
|
val = SAI_FIFOLR_XFL3(reg) +
|
SAI_FIFOLR_XFL2(reg) +
|
SAI_FIFOLR_XFL1(reg) +
|
SAI_FIFOLR_XFL0(reg);
|
}
|
|
return val;
|
}
|
|
static const struct snd_dlp_config dconfig = {
|
.get_fifo_count = dmaengine_mpcm_get_fifo_count,
|
};
|
|
int snd_dmaengine_mpcm_register(struct rk_mdais_dev *mdais)
|
{
|
struct device *dev;
|
struct device *child;
|
struct dmaengine_mpcm *pcm;
|
struct dma_chan *chan;
|
unsigned int *tx_maps, *rx_maps;
|
int ret, i, num;
|
|
dev = mdais->dev;
|
num = mdais->num_dais;
|
tx_maps = mdais->playback_channel_maps;
|
rx_maps = mdais->capture_channel_maps;
|
pcm = kzalloc(sizeof(*pcm), GFP_KERNEL);
|
if (!pcm)
|
return -ENOMEM;
|
|
pcm->mdais = mdais;
|
for (i = 0; i < num; i++) {
|
child = mdais->dais[i].dev;
|
if (tx_maps[i]) {
|
chan = dma_request_chan(child, "tx");
|
if (IS_ERR(chan))
|
chan = NULL;
|
pcm->tx_chans[i] = chan;
|
}
|
|
if (rx_maps[i]) {
|
chan = dma_request_chan(child, "rx");
|
if (IS_ERR(chan))
|
chan = NULL;
|
pcm->rx_chans[i] = chan;
|
}
|
}
|
|
ret = dlp_register(&pcm->dlp, dev, &dmaengine_mpcm_platform, &dconfig);
|
if (ret)
|
goto err_free_dma;
|
|
return 0;
|
|
err_free_dma:
|
dmaengine_mpcm_release_chan(pcm);
|
kfree(pcm);
|
return ret;
|
}
|
EXPORT_SYMBOL_GPL(snd_dmaengine_mpcm_register);
|
|
void snd_dmaengine_mpcm_unregister(struct device *dev)
|
{
|
struct snd_soc_component *component;
|
struct dmaengine_mpcm *pcm;
|
|
component = snd_soc_lookup_component(dev, SND_DMAENGINE_MPCM_DRV_NAME);
|
if (!component)
|
return;
|
|
pcm = soc_component_to_mpcm(component);
|
|
snd_soc_unregister_component(dev);
|
dmaengine_mpcm_release_chan(pcm);
|
kfree(pcm);
|
}
|
EXPORT_SYMBOL_GPL(snd_dmaengine_mpcm_unregister);
|
|
MODULE_LICENSE("GPL");
|
