/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _WCD_CLSH_V2_H_
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#define _WCD_CLSH_V2_H_
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#include <sound/soc.h>
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enum wcd_clsh_event {
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WCD_CLSH_EVENT_PRE_DAC = 1,
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WCD_CLSH_EVENT_POST_PA,
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};
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/*
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* Basic states for Class H state machine.
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* represented as a bit mask within a u8 data type
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* bit 0: EAR mode
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* bit 1: HPH Left mode
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* bit 2: HPH Right mode
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* bit 3: Lineout mode
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*/
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#define WCD_CLSH_STATE_IDLE 0
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#define WCD_CLSH_STATE_EAR BIT(0)
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#define WCD_CLSH_STATE_HPHL BIT(1)
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#define WCD_CLSH_STATE_HPHR BIT(2)
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#define WCD_CLSH_STATE_LO BIT(3)
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#define WCD_CLSH_STATE_MAX 4
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#define NUM_CLSH_STATES_V2 BIT(WCD_CLSH_STATE_MAX)
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enum wcd_clsh_mode {
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CLS_H_NORMAL = 0, /* Class-H Default */
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CLS_H_HIFI, /* Class-H HiFi */
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CLS_H_LP, /* Class-H Low Power */
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CLS_AB, /* Class-AB */
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CLS_H_LOHIFI, /* LoHIFI */
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CLS_NONE, /* None of the above modes */
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};
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struct wcd_clsh_ctrl;
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extern struct wcd_clsh_ctrl *wcd_clsh_ctrl_alloc(
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struct snd_soc_component *component,
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int version);
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extern void wcd_clsh_ctrl_free(struct wcd_clsh_ctrl *ctrl);
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extern int wcd_clsh_ctrl_get_state(struct wcd_clsh_ctrl *ctrl);
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extern int wcd_clsh_ctrl_set_state(struct wcd_clsh_ctrl *ctrl,
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enum wcd_clsh_event event,
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int state,
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enum wcd_clsh_mode mode);
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#endif /* _WCD_CLSH_V2_H_ */
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