/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* ALSA SoC TLV320AIC23 codec driver
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*
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* Author: Arun KS, <arunks@mistralsolutions.com>
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* Copyright: (C) 2008 Mistral Solutions Pvt Ltd
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*/
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#ifndef _TLV320AIC23_H
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#define _TLV320AIC23_H
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struct device;
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struct regmap_config;
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extern const struct regmap_config tlv320aic23_regmap;
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int tlv320aic23_probe(struct device *dev, struct regmap *regmap);
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/* Codec TLV320AIC23 */
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#define TLV320AIC23_LINVOL 0x00
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#define TLV320AIC23_RINVOL 0x01
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#define TLV320AIC23_LCHNVOL 0x02
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#define TLV320AIC23_RCHNVOL 0x03
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#define TLV320AIC23_ANLG 0x04
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#define TLV320AIC23_DIGT 0x05
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#define TLV320AIC23_PWR 0x06
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#define TLV320AIC23_DIGT_FMT 0x07
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#define TLV320AIC23_SRATE 0x08
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#define TLV320AIC23_ACTIVE 0x09
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#define TLV320AIC23_RESET 0x0F
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/* Left (right) line input volume control register */
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#define TLV320AIC23_LRS_ENABLED 0x0100
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#define TLV320AIC23_LIM_MUTED 0x0080
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#define TLV320AIC23_LIV_DEFAULT 0x0017
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#define TLV320AIC23_LIV_MAX 0x001f
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#define TLV320AIC23_LIV_MIN 0x0000
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/* Left (right) channel headphone volume control register */
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#define TLV320AIC23_LZC_ON 0x0080
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#define TLV320AIC23_LHV_DEFAULT 0x0079
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#define TLV320AIC23_LHV_MAX 0x007f
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#define TLV320AIC23_LHV_MIN 0x0000
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/* Analog audio path control register */
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#define TLV320AIC23_STA_REG(x) ((x)<<6)
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#define TLV320AIC23_STE_ENABLED 0x0020
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#define TLV320AIC23_DAC_SELECTED 0x0010
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#define TLV320AIC23_BYPASS_ON 0x0008
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#define TLV320AIC23_INSEL_MIC 0x0004
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#define TLV320AIC23_MICM_MUTED 0x0002
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#define TLV320AIC23_MICB_20DB 0x0001
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/* Digital audio path control register */
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#define TLV320AIC23_DACM_MUTE 0x0008
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#define TLV320AIC23_DEEMP_32K 0x0002
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#define TLV320AIC23_DEEMP_44K 0x0004
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#define TLV320AIC23_DEEMP_48K 0x0006
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#define TLV320AIC23_ADCHP_ON 0x0001
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/* Power control down register */
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#define TLV320AIC23_DEVICE_PWR_OFF 0x0080
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#define TLV320AIC23_CLK_OFF 0x0040
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#define TLV320AIC23_OSC_OFF 0x0020
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#define TLV320AIC23_OUT_OFF 0x0010
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#define TLV320AIC23_DAC_OFF 0x0008
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#define TLV320AIC23_ADC_OFF 0x0004
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#define TLV320AIC23_MIC_OFF 0x0002
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#define TLV320AIC23_LINE_OFF 0x0001
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/* Digital audio interface register */
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#define TLV320AIC23_MS_MASTER 0x0040
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#define TLV320AIC23_LRSWAP_ON 0x0020
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#define TLV320AIC23_LRP_ON 0x0010
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#define TLV320AIC23_IWL_16 0x0000
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#define TLV320AIC23_IWL_20 0x0004
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#define TLV320AIC23_IWL_24 0x0008
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#define TLV320AIC23_IWL_32 0x000C
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#define TLV320AIC23_FOR_I2S 0x0002
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#define TLV320AIC23_FOR_DSP 0x0003
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#define TLV320AIC23_FOR_LJUST 0x0001
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/* Sample rate control register */
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#define TLV320AIC23_CLKOUT_HALF 0x0080
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#define TLV320AIC23_CLKIN_HALF 0x0040
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#define TLV320AIC23_BOSR_384fs 0x0002 /* BOSR_272fs in USB mode */
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#define TLV320AIC23_USB_CLK_ON 0x0001
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#define TLV320AIC23_SR_MASK 0xf
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#define TLV320AIC23_CLKOUT_SHIFT 7
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#define TLV320AIC23_CLKIN_SHIFT 6
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#define TLV320AIC23_SR_SHIFT 2
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#define TLV320AIC23_BOSR_SHIFT 1
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/* Digital interface register */
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#define TLV320AIC23_ACT_ON 0x0001
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/*
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* AUDIO related MACROS
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*/
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#define TLV320AIC23_DEFAULT_OUT_VOL 0x70
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#define TLV320AIC23_DEFAULT_IN_VOLUME 0x10
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#define TLV320AIC23_OUT_VOL_MIN TLV320AIC23_LHV_MIN
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#define TLV320AIC23_OUT_VOL_MAX TLV320AIC23_LHV_MAX
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#define TLV320AIC23_OUT_VO_RANGE (TLV320AIC23_OUT_VOL_MAX - \
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TLV320AIC23_OUT_VOL_MIN)
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#define TLV320AIC23_OUT_VOL_MASK TLV320AIC23_OUT_VOL_MAX
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#define TLV320AIC23_IN_VOL_MIN TLV320AIC23_LIV_MIN
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#define TLV320AIC23_IN_VOL_MAX TLV320AIC23_LIV_MAX
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#define TLV320AIC23_IN_VOL_RANGE (TLV320AIC23_IN_VOL_MAX - \
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TLV320AIC23_IN_VOL_MIN)
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#define TLV320AIC23_IN_VOL_MASK TLV320AIC23_IN_VOL_MAX
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#define TLV320AIC23_SIDETONE_MASK 0x1c0
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#define TLV320AIC23_SIDETONE_0 0x100
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#define TLV320AIC23_SIDETONE_6 0x000
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#define TLV320AIC23_SIDETONE_9 0x040
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#define TLV320AIC23_SIDETONE_12 0x080
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#define TLV320AIC23_SIDETONE_18 0x0c0
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#endif /* _TLV320AIC23_H */
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